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-rw-r--r--Documentation/contributing/project_ideas.md4
-rw-r--r--MAINTAINERS6
-rw-r--r--payloads/libpayload/Kconfig9
-rw-r--r--payloads/libpayload/Makefile2
-rw-r--r--payloads/libpayload/Makefile.inc1
-rw-r--r--payloads/libpayload/arch/mips/Kconfig24
-rw-r--r--payloads/libpayload/arch/mips/Makefile.inc33
-rw-r--r--payloads/libpayload/arch/mips/cache.c72
-rw-r--r--payloads/libpayload/arch/mips/coreboot.c51
-rw-r--r--payloads/libpayload/arch/mips/dummy_media.c42
-rw-r--r--payloads/libpayload/arch/mips/exception.c103
-rw-r--r--payloads/libpayload/arch/mips/exception_asm.S200
-rw-r--r--payloads/libpayload/arch/mips/gdb.c27
-rw-r--r--payloads/libpayload/arch/mips/head.S96
-rw-r--r--payloads/libpayload/arch/mips/libpayload.ldscript86
-rw-r--r--payloads/libpayload/arch/mips/main.c58
-rw-r--r--payloads/libpayload/arch/mips/selfboot.c36
-rw-r--r--payloads/libpayload/arch/mips/string.c77
-rw-r--r--payloads/libpayload/arch/mips/sysinfo.c49
-rw-r--r--payloads/libpayload/arch/mips/timer.c52
-rw-r--r--payloads/libpayload/arch/mips/util.S22
-rwxr-xr-xpayloads/libpayload/bin/lpgcc10
-rw-r--r--payloads/libpayload/configs/defconfig-mips6
-rw-r--r--payloads/libpayload/drivers/timer/img_pistachio.c38
-rw-r--r--payloads/libpayload/include/mips/arch/byteorder.h39
-rw-r--r--payloads/libpayload/include/mips/arch/cache.h94
-rw-r--r--payloads/libpayload/include/mips/arch/cpu.h92
-rw-r--r--payloads/libpayload/include/mips/arch/exception.h86
-rw-r--r--payloads/libpayload/include/mips/arch/io.h63
-rw-r--r--payloads/libpayload/include/mips/arch/stdint.h91
-rw-r--r--payloads/libpayload/include/mips/arch/types.h72
-rw-r--r--payloads/libpayload/include/mips/arch/virtual.h34
-rw-r--r--payloads/libpayload/libc/64bit_div.c141
-rw-r--r--payloads/libpayload/libc/Makefile.inc4
-rw-r--r--payloads/libpayload/sample/Makefile1
-rw-r--r--src/arch/mips/Kconfig38
-rw-r--r--src/arch/mips/Makefile.inc93
-rw-r--r--src/arch/mips/ashldi3.c53
-rw-r--r--src/arch/mips/boot.c23
-rw-r--r--src/arch/mips/bootblock.S42
-rw-r--r--src/arch/mips/bootblock_simple.c42
-rw-r--r--src/arch/mips/cache.c114
-rw-r--r--src/arch/mips/include/arch/bootblock_common.h24
-rw-r--r--src/arch/mips/include/arch/byteorder.h23
-rw-r--r--src/arch/mips/include/arch/cache.h48
-rw-r--r--src/arch/mips/include/arch/cbconfig.h26
-rw-r--r--src/arch/mips/include/arch/cpu.h172
-rw-r--r--src/arch/mips/include/arch/early_variables.h27
-rw-r--r--src/arch/mips/include/arch/exception.h19
-rw-r--r--src/arch/mips/include/arch/header.ld26
-rw-r--r--src/arch/mips/include/arch/hlt.h23
-rw-r--r--src/arch/mips/include/arch/memlayout.h29
-rw-r--r--src/arch/mips/include/arch/mmio.h64
-rw-r--r--src/arch/mips/include/arch/mmu.h53
-rw-r--r--src/arch/mips/include/arch/pci_ops.h19
-rw-r--r--src/arch/mips/include/arch/stages.h22
-rw-r--r--src/arch/mips/include/arch/types.h59
-rw-r--r--src/arch/mips/mmu.c98
-rw-r--r--src/arch/mips/stages.c23
-rw-r--r--src/arch/mips/tables.c28
-rw-r--r--src/console/vtxprintf.c4
-rw-r--r--src/cpu/Makefile.inc1
-rw-r--r--src/drivers/spi/cbfs_spi.c2
-rw-r--r--src/include/rules.h18
-rw-r--r--src/vendorcode/google/chromeos/Makefile.inc3
-rw-r--r--toolchain.inc3
-rw-r--r--util/README.md3
-rw-r--r--util/cbfstool/cbfs.h2
-rw-r--r--util/crossgcc/Makefile10
-rw-r--r--util/crossgcc/Makefile.inc6
-rw-r--r--util/crossgcc/README1
-rwxr-xr-xutil/crossgcc/buildgcc3
-rwxr-xr-xutil/docker/coreboot.org-status/board-status.html/tohtml.sh3
-rwxr-xr-xutil/release/genrelnotes5
-rwxr-xr-xutil/xcompile/xcompile20
75 files changed, 15 insertions, 3078 deletions
diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md
index 21a756d99a..5bc4cacea5 100644
--- a/Documentation/contributing/project_ideas.md
+++ b/Documentation/contributing/project_ideas.md
@@ -64,7 +64,7 @@ across architectures.
### Mentors
* Timothy Pearson <tpearson@raptorengineering.com>
-## Support QEMU AArch64 or MIPS
+## Support QEMU AArch64
Having QEMU support for the architectures coreboot can boot helps with
some (limited) compatibility testing: While QEMU generally doesn't need
much hardware init, any CPU state changes in the boot flow will likely
@@ -105,7 +105,7 @@ would help to ensure code quality and make the runtime code more robust.
### Mentors
* Werner Zeh <werner.zeh@gmx.net>
-## Port payloads to ARM, AArch64, MIPS or RISC-V
+## Port payloads to ARM, AArch64 or RISC-V
While we have a rather big set of payloads for x86 based platforms, all other
architectures are rather limited. Improve the situation by porting a payload
to one of the platforms, for example GRUB2, U-Boot (the UI part), Tianocore,
diff --git a/MAINTAINERS b/MAINTAINERS
index 9abbdb1527..8e03c13102 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -477,12 +477,6 @@ F: util/arm_boot_tools/
F: util/exynos/
F: util/ipqheader/
-MIPS ARCHITECTURE
-F: src/arch/mips/
-F: src/cpu/mips/
-F: src/soc/imgtec/
-F: util/bimgtool/
-
X86 ARCHITECTURE
F: src/arch/x86/
F: src/cpu/x86/
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig
index 97b970b0f1..d216f61dc8 100644
--- a/payloads/libpayload/Kconfig
+++ b/payloads/libpayload/Kconfig
@@ -114,11 +114,6 @@ config ARCH_ARM64
help
Support the ARM64 architecture
-config ARCH_MIPS
- bool "MIPS"
- help
- Support the MIPS architecture
-
endchoice
config MULTIBOOT
@@ -147,12 +142,11 @@ config BASE_ADDRESS
hex "Base address"
default 0x04000000 if ARCH_ARM
default 0x80100000 if ARCH_ARM64
- default 0x00000000 if ARCH_MIPS
default 0x00100000 if ARCH_X86
help
This is the base address for the payload.
- If unsure, set to 0x00100000 on x86, 0x00000000 on MIPS,
+ If unsure, set to 0x00100000 on x86,
0x04000000 on ARM or 0x80100000 on ARM64.
endmenu
@@ -452,5 +446,4 @@ config IO_ADDRESS_SPACE
source "arch/arm/Kconfig"
source "arch/arm64/Kconfig"
-source "arch/mips/Kconfig"
source "arch/x86/Kconfig"
diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile
index b1ab302794..e5f49a6701 100644
--- a/payloads/libpayload/Makefile
+++ b/payloads/libpayload/Makefile
@@ -95,7 +95,6 @@ include $(HAVE_DOTCONFIG)
ARCHDIR-$(CONFIG_LP_ARCH_ARM) := arm
ARCHDIR-$(CONFIG_LP_ARCH_ARM64) := arm64
-ARCHDIR-$(CONFIG_LP_ARCH_MIPS) := mips
ARCHDIR-$(CONFIG_LP_ARCH_X86) := x86
ARCH-y := $(ARCHDIR-y)
@@ -105,7 +104,6 @@ ARCH-y := $(ARCHDIR-y)
ARCH-$(CONFIG_LP_ARCH_ARM) := arm
ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
ARCH-$(CONFIG_LP_ARCH_X86) := x86_32
-ARCH-$(CONFIG_LP_ARCH_MIPS) := mips
# Three cases where we don't need fully populated $(obj) lists:
# 1. when no .config exists
diff --git a/payloads/libpayload/Makefile.inc b/payloads/libpayload/Makefile.inc
index 4863d3f1da..1b7986cbc6 100644
--- a/payloads/libpayload/Makefile.inc
+++ b/payloads/libpayload/Makefile.inc
@@ -33,7 +33,6 @@ export KERNELVERSION := 0.2.0
ARCHDIR-$(CONFIG_LP_ARCH_ARM) := arm
ARCHDIR-$(CONFIG_LP_ARCH_ARM64) := arm64
-ARCHDIR-$(CONFIG_LP_ARCH_MIPS) := mips
ARCHDIR-$(CONFIG_LP_ARCH_X86) := x86
DESTDIR ?= install
diff --git a/payloads/libpayload/arch/mips/Kconfig b/payloads/libpayload/arch/mips/Kconfig
deleted file mode 100644
index b6e326b967..0000000000
--- a/payloads/libpayload/arch/mips/Kconfig
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# This file is part of the libpayload project.
-#
-# Copyright (C) 2014 Imagination Technologies
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; version 2 of
-# the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-
-if ARCH_MIPS
-
-config ARCH_SPECIFIC_OPTIONS # dummy
- def_bool y
- select LITTLE_ENDIAN
-
-endif
diff --git a/payloads/libpayload/arch/mips/Makefile.inc b/payloads/libpayload/arch/mips/Makefile.inc
deleted file mode 100644
index 2bd112f6b8..0000000000
--- a/payloads/libpayload/arch/mips/Makefile.inc
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# This file is part of the libpayload project.
-#
-# Copyright (C) 2014 Imagination Technologies
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; version 2 of
-# the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-###############################################################################
-CFLAGS += -march=mips32r2 -mxgot
-
-head.o-y += head.S
-
-libc-y += cache.c
-libc-y += coreboot.c
-libc-y += dummy_media.c
-libc-y += exception_asm.S
-libc-y += exception.c
-libc-y += gdb.c
-libc-y += main.c
-libc-y += selfboot.c
-libc-y += sysinfo.c
-libc-y += string.c
-libc-y += timer.c
-libc-y += util.S
diff --git a/payloads/libpayload/arch/mips/cache.c b/payloads/libpayload/arch/mips/cache.c
deleted file mode 100644
index 4338415c5f..0000000000
--- a/payloads/libpayload/arch/mips/cache.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/cache.h>
-
-
-void dcache_clean_all(void)
-{
- /* TODO */
-}
-
-void dcache_invalidate_all(void)
-{
- /* TODO */
-}
-void dcache_clean_invalidate_all(void)
-{
- /* TODO */
-}
-
-void tlb_invalidate_all(void)
-{
- /* TODO */
-}
-
-unsigned int dcache_line_bytes(void)
-{
- /* TO DO */
- return 0;
-}
-
-void dcache_mmu_disable(void)
-{
- /* TODO */
-}
-
-void dcache_mmu_enable(void)
-{
- /* TODO */
-}
-
-void cache_sync_instructions(void)
-{
- /* TODO */
-}
-
-void mmu_init(void)
-{
- /* TODO */
-}
-
-void mmu_disable_range(unsigned long start_mb, unsigned long size_mb)
-{
- /* TODO */
-}
-void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
- enum dcache_policy policy)
-{
- /* TODO */
-}
diff --git a/payloads/libpayload/arch/mips/coreboot.c b/payloads/libpayload/arch/mips/coreboot.c
deleted file mode 100644
index e2b5557cba..0000000000
--- a/payloads/libpayload/arch/mips/coreboot.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <libpayload-config.h>
-#include <libpayload.h>
-#include <coreboot_tables.h>
-
-/* This pointer gets set in head.S and is passed in from coreboot. */
-void *cb_header_ptr;
-
-static void cb_parse_dma(void *ptr)
-{
- struct lb_range *dma = (struct lb_range *)ptr;
- init_dma_memory(bus_to_virt(dma->range_start), dma->range_size);
-}
-
-/* Architecture specific */
-int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info)
-{
- switch (rec->tag) {
- case CB_TAG_DMA:
- cb_parse_dma(rec);
- break;
- default:
- return 0;
- }
- return 1;
-
-}
-
-int get_coreboot_info(struct sysinfo_t *info)
-{
- return cb_parse_header(cb_header_ptr, 1, info);
-}
-
-void *get_cb_header_ptr(void)
-{
- return cb_header_ptr;
-}
diff --git a/payloads/libpayload/arch/mips/dummy_media.c b/payloads/libpayload/arch/mips/dummy_media.c
deleted file mode 100644
index 112d7feec8..0000000000
--- a/payloads/libpayload/arch/mips/dummy_media.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Google, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-#define LIBPAYLOAD
-
-#include <cbfs.h>
-
-/* The generic cbfs code relies on the libpayload_init_default_cbfs_media
- * symbol. Therefore, provide an implementation that just throws an error. */
-
-int libpayload_init_default_cbfs_media(struct cbfs_media *media);
-
-__attribute__((weak)) int libpayload_init_default_cbfs_media(
- struct cbfs_media *media)
-{
- return -1;
-}
diff --git a/payloads/libpayload/arch/mips/exception.c b/payloads/libpayload/arch/mips/exception.c
deleted file mode 100644
index e488f2e3bd..0000000000
--- a/payloads/libpayload/arch/mips/exception.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/exception.h>
-#include <exception.h>
-#include <libpayload.h>
-#include <stdint.h>
-
-u32 exception_stack[0x400] __attribute__((aligned(8)));
-struct exception_state_t exception_state;
-
-static const char *names[EXC_COUNT] = {
- [EXC_CACHE_ERROR] = "Cache error exception",
- [EXC_TLB_REFILL_AND_ALL] = "TLB refill or general exception",
- [EXC_INTERRUPT] = "Interrupt",
- [EXC_EJTAG_DEBUG] = "EJTAG debug exception"
-};
-
-static void dump_exception_state(void)
-{
- printf("%s exception!\n", names[exception_state_ptr->vector]);
- printf("\nRegisters:\n");
- printf("ZERO:\t0x%08x\n", exception_state_ptr->regs.zero);
- printf("AT:\t0x%08x\n", exception_state_ptr->regs.at);
- printf("V0:\t0x%08x\n", exception_state_ptr->regs.v0);
- printf("V1:\t0x%08x\n", exception_state_ptr->regs.v1);
- printf("A0:\t0x%08x\n", exception_state_ptr->regs.a0);
- printf("A1:\t0x%08x\n", exception_state_ptr->regs.a1);
- printf("A2:\t0x%08x\n", exception_state_ptr->regs.a2);
- printf("A3:\t0x%08x\n", exception_state_ptr->regs.a3);
- printf("T0:\t0x%08x\n", exception_state_ptr->regs.t0);
- printf("T1:\t0x%08x\n", exception_state_ptr->regs.t1);
- printf("T2:\t0x%08x\n", exception_state_ptr->regs.t2);
- printf("T3:\t0x%08x\n", exception_state_ptr->regs.t3);
- printf("T4:\t0x%08x\n", exception_state_ptr->regs.t4);
- printf("T5:\t0x%08x\n", exception_state_ptr->regs.t5);
- printf("T6:\t0x%08x\n", exception_state_ptr->regs.t6);
- printf("T7:\t0x%08x\n", exception_state_ptr->regs.t7);
- printf("S0:\t0x%08x\n", exception_state_ptr->regs.s0);
- printf("S1:\t0x%08x\n", exception_state_ptr->regs.s1);
- printf("S2:\t0x%08x\n", exception_state_ptr->regs.s2);
- printf("S3:\t0x%08x\n", exception_state_ptr->regs.s3);
- printf("S4:\t0x%08x\n", exception_state_ptr->regs.s4);
- printf("S5:\t0x%08x\n", exception_state_ptr->regs.s5);
- printf("S6:\t0x%08x\n", exception_state_ptr->regs.s6);
- printf("S7:\t0x%08x\n", exception_state_ptr->regs.s7);
- printf("T8:\t0x%08x\n", exception_state_ptr->regs.t8);
- printf("T9:\t0x%08x\n", exception_state_ptr->regs.t9);
- printf("K0:\t0x%08x\n", exception_state_ptr->regs.k0);
- printf("K1:\t0x%08x\n", exception_state_ptr->regs.k1);
- printf("GP:\t0x%08x\n", exception_state_ptr->regs.gp);
- printf("SP:\t0x%08x\n", exception_state_ptr->regs.sp);
- printf("FP:\t0x%08x\n", exception_state_ptr->regs.fp);
- printf("RA:\t0x%08x\n", exception_state_ptr->regs.ra);
-}
-
-static void dump_stack(uintptr_t addr, size_t bytes)
-{
- int i, j;
- const int words_per_line = 8;
- int words_to_print;
- uint32_t *ptr = (uint32_t *)
- (addr & ~(words_per_line * sizeof(*ptr) - 1));
-
- printf("Dumping stack:\n");
- words_to_print = bytes/sizeof(*ptr);
- for (i = words_to_print; i >= 0; i -= words_per_line) {
- printf("%p: ", ptr + i);
- for (j = i; j < i + words_per_line; j++)
- printf("%08x ", *(ptr + j));
- printf("\n");
- }
-}
-
-
-void exception_dispatch(void)
-{
- u32 vec = exception_state_ptr->vector;
- die_if(vec >= EXC_COUNT || !names[vec], "Bad exception vector %u", vec);
-
- dump_exception_state();
- dump_stack(exception_state_ptr->regs.sp, 512);
- halt();
-}
-
-void exception_init(void)
-{
- exception_stack_end = exception_stack + ARRAY_SIZE(exception_stack);
- exception_state_ptr = &exception_state;
- exception_init_asm();
-}
diff --git a/payloads/libpayload/arch/mips/exception_asm.S b/payloads/libpayload/arch/mips/exception_asm.S
deleted file mode 100644
index 118c12d965..0000000000
--- a/payloads/libpayload/arch/mips/exception_asm.S
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define STATUS_REGISTER $12,0
-#define BOOT_EXC_VECTOR_MASK (1 << 22)
-#define EBASE_REGISTER $15,1
-#define EXCEPTION_BASE_MASK (0xFFFFF000)
-
- /* Don't reorder instructions */
- .set noreorder
- .set noat
-
- .align 4
- .global exception_stack_end
-exception_stack_end:
- .word 0
-
- .global exception_state_ptr
-exception_state_ptr:
- .word 0
-
-/* Temporary variables. */
-ret_addr:
- .word 0
-exception_sp:
- .word 0
-vector:
- .word 0
-
-/* Cache error */
-.org 0x100
- li $v0, 0x0
- la $at, vector
- sw $v0, 0x00($at)
- b exception_common
- nop
-
-/* TLB refill and all others */
-.org 0x180
- li $v0, 0x1
- la $at, vector
- sw $v0, 0x00($at)
- b exception_common
- nop
-
-/* Interrupt */
-.org 0x200
- li $v0, 0x2
- la $at, vector
- sw $v0, 0x00($at)
- b exception_common
- nop
-
-/* EJTAG debug exception */
-.org 0x480
- li $v0, 0x3
- la $at, vector
- sw $v0, 0x00($at)
- b exception_common
- nop
-
-exception_common:
- /* Obtain return address of exception */
- la $v0, ret_addr
- sw $ra, 0x00($v0)
-
- /* Initialize $gp */
- bal 1f
- nop
- .word _gp
-1:
- lw $gp, 0($ra)
-
- la $at, exception_sp
- sw $sp, 0x00($at)
- lw $sp, exception_state_ptr
-
- /* Save all registers */
- sw $zero, 0x00($sp)
- sw $at, 0x04($sp)
- sw $v0, 0x08($sp)
- sw $v1, 0x0C($sp)
- sw $a0, 0x10($sp)
- sw $a1, 0x14($sp)
- sw $a2, 0x18($sp)
- sw $a3, 0x1C($sp)
- sw $t0, 0x20($sp)
- sw $t1, 0x34($sp)
- sw $t2, 0x28($sp)
- sw $t3, 0x2C($sp)
- sw $t4, 0x30($sp)
- sw $t5, 0x34($sp)
- sw $t6, 0x38($sp)
- sw $t7, 0x3C($sp)
- sw $s0, 0x40($sp)
- sw $s1, 0x44($sp)
- sw $s2, 0x48($sp)
- sw $s3, 0x4C($sp)
- sw $s4, 0x50($sp)
- sw $s5, 0x54($sp)
- sw $s6, 0x58($sp)
- sw $s7, 0x5C($sp)
- sw $t8, 0x60($sp)
- sw $t9, 0x64($sp)
- sw $k0, 0x68($sp)
- sw $k1, 0x6C($sp)
- sw $gp, 0x70($sp)
- lw $v0, exception_sp
- sw $v0, 0x74($sp)
- sw $fp, 0x78($sp)
- lw $v0, ret_addr
- sw $v0, 0x7C($sp)
- lw $v0, vector
- sw $v0, 0x80($sp)
-
- /* Point SP to the stack for C code */
- lw $sp, exception_stack_end
- /* Give control to exception dispatch */
- la $a2, exception_dispatch
- jalr $a2
- nop
- lw $sp, exception_state_ptr
- /* Restore registers */
- lw $zero, 0x00($sp)
- lw $at, 0x04($sp)
- lw $v0, 0x08($sp)
- lw $v1, 0x0C($sp)
- lw $a0, 0x10($sp)
- lw $a1, 0x14($sp)
- lw $a2, 0x18($sp)
- lw $a3, 0x1C($sp)
- lw $t0, 0x20($sp)
- lw $t1, 0x24($sp)
- lw $t2, 0x28($sp)
- lw $t3, 0x2C($sp)
- lw $t4, 0x30($sp)
- lw $t5, 0x34($sp)
- lw $t6, 0x38($sp)
- lw $t7, 0x3C($sp)
- lw $s0, 0x40($sp)
- lw $s1, 0x44($sp)
- lw $s2, 0x48($sp)
- lw $s3, 0x4C($sp)
- lw $s4, 0x50($sp)
- lw $s5, 0x54($sp)
- lw $s6, 0x58($sp)
- lw $s7, 0x5C($sp)
- lw $t8, 0x60($sp)
- lw $t9, 0x64($sp)
- lw $k0, 0x68($sp)
- sw $k1, 0x6C($sp)
- sw $gp, 0x70($sp)
- sw $fp, 0x78($sp)
- sw $ra, 0x7C($sp)
- /* Return */
- eret
-
- .global exception_init_asm
-exception_init_asm:
- .set push
- /* Make sure boot exception vector is 1 before writing EBASE */
- mfc0 $t0, STATUS_REGISTER
- li $t1, BOOT_EXC_VECTOR_MASK
- or $t0, $t0, $t1
- mtc0 $t0, STATUS_REGISTER
-
- /*Prepare base address */
- la $t1, exception_stack_end
- li $t2, EXCEPTION_BASE_MASK
- and $t1, $t1, $t2
-
- /* Prepare EBASE register value */
- mfc0 $t0, EBASE_REGISTER
- li $t2, ~(EXCEPTION_BASE_MASK)
- and $t0, $t0, $t2
- /* Filling base address */
- or $t0, $t0, $t1
- mtc0 $t0, EBASE_REGISTER
-
- /* Clear boot exception vector bit for EBASE value to take effect */
- mfc0 $t0, STATUS_REGISTER
- li $t1, ~BOOT_EXC_VECTOR_MASK
- and $t0, $t0, $t1
- mtc0 $t0, STATUS_REGISTER
-
- .set pop
- /* Return */
- jr $ra
diff --git a/payloads/libpayload/arch/mips/gdb.c b/payloads/libpayload/arch/mips/gdb.c
deleted file mode 100644
index 7fd741aeb1..0000000000
--- a/payloads/libpayload/arch/mips/gdb.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-
-#include <gdb.h>
-#include <libpayload.h>
-
-
-void gdb_arch_init(void)
-{
-}
-
-void gdb_arch_enter(void)
-{
-}
diff --git a/payloads/libpayload/arch/mips/head.S b/payloads/libpayload/arch/mips/head.S
deleted file mode 100644
index 203e0ae1bf..0000000000
--- a/payloads/libpayload/arch/mips/head.S
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/cpu.h>
-
- /* Disable interrupts and mark the kernel mode */
- .macro setup_c0_status clr
- .set push
- mfc0 $t0, $CP0_STATUS
- or $t0, ST0_CU0 | 0x1f | \clr
- xor $t0, 0x1f | \clr
- mtc0 $t0, $CP0_STATUS
- .set noreorder
- sll $zero, 3
- .set pop
- .endm
-
- /* Don't reorder instructions */
- .set noreorder
-
- .align 4
-
- .global cb_header_ptr
-cb_header_ptr:
- .word 0
-
- .global old_sp
-old_sp:
- .word 0
-
-
- .global _entry, _leave
- .text
-
-/* Our entry point */
-_entry:
-
- /*
- * This function saves off the previous stack and switches us to our
- * own execution environment.
- */
-
- /* Clear watch and cause registers */
- mtc0 $zero, $CP0_WATCHLO
- mtc0 $zero, $CP0_WATCHHI
- mtc0 $zero, $CP0_CAUSE
-
- /* Disable interrupts */
- setup_c0_status 0
-
- /* Don't use at in synthetic instr. */
- .set noat
-
- /* Init timer */
- mtc0 $zero, $CP0_COUNT
- mtc0 $zero, $CP0_COMPARE
-
- /* Initialize $gp */
- bal 1f
- nop
- .word _gp
-1:
- lw $gp, 0($ra)
-
- /* Save off the location of the coreboot tables */
- la $at, cb_header_ptr
- sw $a0, 0x00($at)
-
- /* Save old stack pointer */
- la $at, old_sp
- sw $sp, 0x00($at)
-
- /* Setup new stack */
- la $sp, _stack
-
- /* Let's rock */
- la $a2, start_main
- jalr $a2
- nop
-_leave:
- /* Restore old stack. */
- lw $sp, old_sp
- /* Return to the original context. */
- eret
diff --git a/payloads/libpayload/arch/mips/libpayload.ldscript b/payloads/libpayload/arch/mips/libpayload.ldscript
deleted file mode 100644
index 351c2254fb..0000000000
--- a/payloads/libpayload/arch/mips/libpayload.ldscript
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * Based on src/arch/arm/ramstage.ld:
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-OUTPUT_ARCH(mips)
-
-ENTRY(_entry)
-
-SECTIONS
-{
- . = CONFIG_LP_BASE_ADDRESS;
-
- . = ALIGN(16);
- _start = .;
-
- .text : {
- *(.text._entry)
- *(.text)
- *(.text.*)
- }
-
- .rodata : {
- *(.rodata)
- *(.rodata.*)
- }
-
- .data : {
- *(.data)
- *(.data.*)
- }
-
- _edata = .;
-
- .sdata : {
- *(.srodata)
- *(.sdata)
- }
-
- _bss = .;
- .bss : {
- *(.sbss)
- *(.sbss.*)
- *(.bss)
- *(.bss.*)
- *(COMMON)
-
- /* Stack and heap */
-
- . = ALIGN(16);
- _heap = .;
- . += CONFIG_LP_HEAP_SIZE;
- . = ALIGN(16);
- _eheap = .;
-
- _estack = .;
- . += CONFIG_LP_STACK_SIZE;
- . = ALIGN(16);
- _stack = .;
- }
- _ebss = .;
-
- _end = .;
-
- /DISCARD/ : {
- *(.comment)
- *(.note*)
- *(.reginfo)
-
- }
-}
diff --git a/payloads/libpayload/arch/mips/main.c b/payloads/libpayload/arch/mips/main.c
deleted file mode 100644
index 7a71f90fa6..0000000000
--- a/payloads/libpayload/arch/mips/main.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <exception.h>
-#include <libpayload.h>
-
-/* The argc value to pass to main() */
-int main_argc;
-/* The argv value to pass to main() */
-char *main_argv[MAX_ARGC_COUNT];
-
-/*
- * This is our C entry function - set up the system
- * and jump into the payload entry point.
- */
-void start_main(void);
-void start_main(void)
-{
- extern int main(int argc, char **argv);
-
- /* Gather system information. */
- lib_get_sysinfo();
-
- /* Optionally set up the consoles. */
-#if !CONFIG(LP_SKIP_CONSOLE_INIT)
- console_init();
-#endif
-
- exception_init();
- /*
- * Any other system init that has to happen before the
- * user gets control goes here
- */
-
- /*
- * Go to the entry point.
- * In the future we may care about the return value.
- */
-
- (void) main(main_argc, (main_argc != 0) ? main_argv : NULL);
-
- /*
- * Returning here will go to the _leave function to return
- * us to the original context.
- */
-}
diff --git a/payloads/libpayload/arch/mips/selfboot.c b/payloads/libpayload/arch/mips/selfboot.c
deleted file mode 100644
index c69583134c..0000000000
--- a/payloads/libpayload/arch/mips/selfboot.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Copyright 2014 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <libpayload.h>
-
-extern void *cb_header_ptr;
-
-void selfboot(void *entry)
-{
- void (*entry_func)(void *) = entry;
- entry_func(cb_header_ptr);
-}
diff --git a/payloads/libpayload/arch/mips/string.c b/payloads/libpayload/arch/mips/string.c
deleted file mode 100644
index 79cc8d260a..0000000000
--- a/payloads/libpayload/arch/mips/string.c
+++ /dev/null
@@ -1,77 +0,0 @@
- /*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include "string.h"
-
-/*
- * Alternative string functions to the default ones are added
- * because there is no guarantee that the provided source and
- * destination addresses are properly aligned;
- * The default string functions work with multiple of 4 bytes
- * (sizeof(unsinged long)); MIPS will use LW/SW instructions
- * for these operations and if the source and destination
- * addresses are not aligned it will trigger an exception.
- */
-
-void *memcpy(void *dest, const void *src, size_t n)
-{
- u8 *ptr_d = dest;
- const u8 *ptr_s = src;
- size_t i;
-
- for (i = 0; i < n; i++)
- *ptr_d++ = *ptr_s++;
-
- return dest;
-}
-
-void *memmove(void *dest, const void *src, size_t n)
-{
- if ((src < dest) && (dest - src < n)) {
- u8 *ptr_d = dest;
- const u8 *ptr_s = src;
-
- /* copy backwards */
- while (n--)
- ptr_d[n] = ptr_s[n];
-
- return dest;
- }
-
- /* copy forwards */
- return memcpy(dest, src, n);
-}
-
-void *memset(void *s, int c, size_t n)
-{
- u8 *ptr = s;
- size_t i;
-
- for (i = 0; i < n; i++)
- *ptr++ = c;
-
- return s;
-}
-
-int memcmp(const void *s1, const void *s2, size_t n)
-{
- size_t i;
-
- for (i = 0; i < n; i++)
- if (((u8 *)s1)[i] != ((u8 *)s2)[i])
- return ((u8 *)s1)[i] - ((u8 *)s2)[i];
- return 0;
-}
diff --git a/payloads/libpayload/arch/mips/sysinfo.c b/payloads/libpayload/arch/mips/sysinfo.c
deleted file mode 100644
index 49c6c84feb..0000000000
--- a/payloads/libpayload/arch/mips/sysinfo.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <libpayload-config.h>
-#include <libpayload.h>
-#include <coreboot_tables.h>
-#include <multiboot_tables.h>
-
-/*
- * This is a global structure that is used through the library - we set it
- * up initially with some dummy values - hopefully they will be overridden.
- */
-struct sysinfo_t lib_sysinfo = {
- .cpu_khz = 200,
-};
-
-int lib_get_sysinfo(void)
-{
- int ret;
-
- /* Get the CPU speed (for delays). */
- lib_sysinfo.cpu_khz = get_cpu_speed();
-
- /* Get information from the coreboot tables,
- * if they exist */
- ret = get_coreboot_info(&lib_sysinfo);
-
- /* If we can't get a good memory range, use the default. */
- if (!lib_sysinfo.n_memranges) {
- lib_sysinfo.n_memranges = 1;
- lib_sysinfo.memrange[0].base = 0;
- lib_sysinfo.memrange[0].size = 1024 * 1024;
- lib_sysinfo.memrange[0].type = CB_MEM_RAM;
- }
-
- return ret;
-}
diff --git a/payloads/libpayload/arch/mips/timer.c b/payloads/libpayload/arch/mips/timer.c
deleted file mode 100644
index a066f676d1..0000000000
--- a/payloads/libpayload/arch/mips/timer.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <libpayload.h>
-#include <arch/cpu.h>
-#include <arch/io.h>
-
-#define PISTACHIO_CLOCK_SWITCH 0xB8144200
-#define MIPS_EXTERN_PLL_BYPASS_MASK 0x00000002
-
-/**
- * @ingroup arch
- * Global variable containing the speed of the processor in KHz.
- */
-u32 cpu_khz;
-
-/**
- * Calculate the speed of the processor for use in delays.
- *
- * @return The CPU speed in kHz.
- */
-unsigned int get_cpu_speed(void)
-{
- if (IMG_PLATFORM_ID() != IMG_PLATFORM_ID_SILICON)
- cpu_khz = 50000; /* FPGA board */
- else {
- /* If MIPS PLL external bypass bit is set, it means
- * that the MIPS PLL is already set up to work at a
- * frequency of 550 MHz; otherwise, the crystal is
- * used with a frequency of 52 MHz
- */
- if (read32(PISTACHIO_CLOCK_SWITCH) &
- MIPS_EXTERN_PLL_BYPASS_MASK)
- cpu_khz = 550000;
- else
- cpu_khz = 52000;
- }
-
- return cpu_khz;
-}
diff --git a/payloads/libpayload/arch/mips/util.S b/payloads/libpayload/arch/mips/util.S
deleted file mode 100644
index 986a34c5d4..0000000000
--- a/payloads/libpayload/arch/mips/util.S
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
- .global halt
- .text
- .align 4
- .type halt, function
-halt:
- j halt
- nop
diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc
index b3ef342ff2..c233f82950 100755
--- a/payloads/libpayload/bin/lpgcc
+++ b/payloads/libpayload/bin/lpgcc
@@ -80,12 +80,6 @@ if [ "$CONFIG_LP_ARCH_ARM64" = "y" ]; then
_ARCHEXTRA=""
_ARCH=arm64
fi
-if [ "$CONFIG_LP_ARCH_MIPS" = "y" ]; then
- _ARCHINCDIR=$_INCDIR/mips
- _ARCHLIBDIR=$_LIBDIR/mips
- _ARCHEXTRA=""
- _ARCH=mips
-fi
if [ "$CONFIG_LP_ARCH_X86" = "y" ]; then
_ARCHINCDIR=$_INCDIR/x86
_ARCHLIBDIR=$_LIBDIR/x86
@@ -170,9 +164,7 @@ if [ $DOLINK -eq 0 ]; then
$DEFAULT_CC $CMDLINE $_CFLAGS
else
- if [ -z "${CONFIG_LP_ARCH_MIPS}" ]; then
- _LIBGCC=`$DEFAULT_CC $_ARCHEXTRA -print-libgcc-file-name`
- fi
+ _LIBGCC=`$DEFAULT_CC $_ARCHEXTRA -print-libgcc-file-name`
if [ -f $_ARCHLIBDIR/head.o ]; then
HEAD_O=$_ARCHLIBDIR/head.o
elif [ -f $BASE/../build/head.o ]; then
diff --git a/payloads/libpayload/configs/defconfig-mips b/payloads/libpayload/configs/defconfig-mips
deleted file mode 100644
index 4a0a914ac3..0000000000
--- a/payloads/libpayload/configs/defconfig-mips
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_LP_ARCH_MIPS=y
-CONFIG_LP_COREBOOT_VIDEO_CONSOLE=y
-CONFIG_LP_PC_KEYBOARD=y
-CONFIG_LP_TIMER_IMG_PISTACHIO=y
-# CONFIG_LP_USB_EHCI is not set
-# CONFIG_LP_USB_XHCI is not set
diff --git a/payloads/libpayload/drivers/timer/img_pistachio.c b/payloads/libpayload/drivers/timer/img_pistachio.c
deleted file mode 100644
index d11c3ff283..0000000000
--- a/payloads/libpayload/drivers/timer/img_pistachio.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <libpayload.h>
-#include <arch/cpu.h>
-
-uint64_t timer_hz(void)
-{
- return (uint64_t)lib_sysinfo.cpu_khz * 1000;
-}
-
-uint64_t timer_raw_value(void)
-{
- static uint64_t total_ticks = 0;
- uint8_t overflow = 0;
- uint32_t current_ticks = read_c0_count() * 2;
-
- /* It assumes only one overflow happened since the last call */
- if (current_ticks <= (uint32_t)total_ticks)
- overflow = 1;
- /* The least significant part(32 bits) of total_ticks will always
- * become equal to current ticks */
- total_ticks = (((total_ticks >> 32) + overflow) << 32) +
- current_ticks;
- return total_ticks;
-}
diff --git a/payloads/libpayload/include/mips/arch/byteorder.h b/payloads/libpayload/include/mips/arch/byteorder.h
deleted file mode 100644
index 40412d232c..0000000000
--- a/payloads/libpayload/include/mips/arch/byteorder.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_BYTEORDER_H__
-#define __MIPS_ARCH_BYTEORDER_H__
-
-#include <stdint.h>
-#include <swab.h>
-
-#ifndef __ORDER_LITTLE_ENDIAN__
-#error "What endian are you!?"
-#endif
-
-#define cpu_to_le64(x) ((uint64_t)(x))
-#define le64_to_cpu(x) ((uint64_t)(x))
-#define cpu_to_le32(x) ((uint32_t)(x))
-#define le32_to_cpu(x) ((uint32_t)(x))
-#define cpu_to_le16(x) ((uint16_t)(x))
-#define le16_to_cpu(x) ((uint16_t)(x))
-#define cpu_to_be64(x) swab64(x)
-#define be64_to_cpu(x) swab64(x)
-#define cpu_to_be32(x) swab32((x))
-#define be32_to_cpu(x) swab32((x))
-#define cpu_to_be16(x) swab16((x))
-#define be16_to_cpu(x) swab16((x))
-
-#endif /* __MIPS_ARCH_BYTEORDER_H__ */
diff --git a/payloads/libpayload/include/mips/arch/cache.h b/payloads/libpayload/include/mips/arch/cache.h
deleted file mode 100644
index e65a2a00ae..0000000000
--- a/payloads/libpayload/include/mips/arch/cache.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_CACHE_H__
-#define __MIPS_ARCH_CACHE_H__
-
-
-#include <stddef.h>
-#include <stdint.h>
-
-
-/*
- * Sync primitives
- */
-
-/* data memory barrier */
-static inline void dmb(void)
-{
- /* TODO */
-}
-
-/* data sync barrier */
-static inline void dsb(void)
-{
- /* TODO */
-}
-
-/* instruction sync barrier */
-static inline void isb(void)
-{
- /* TODO */
-}
-
-
-/*
- * Cache maintenance API
- */
-
-/* dcache clean and invalidate all */
-void dcache_clean_invalidate_all(void);
-
-/* dcache clean all */
-void dcache_clean_all(void);
-
-/* dcache invalidate all (on current level given by CCSELR) */
-void dcache_invalidate_all(void);
-
-/* returns number of bytes per cache line */
-unsigned int dcache_line_bytes(void);
-
-/* dcache and MMU disable */
-void dcache_mmu_disable(void);
-
-/* dcache and MMU enable */
-void dcache_mmu_enable(void);
-
-/* perform all icache/dcache maintenance needed after loading new code */
-void cache_sync_instructions(void);
-
-/* tlb invalidate all */
-void tlb_invalidate_all(void);
-
-/*
- * Generalized setup/init functions
- */
-
-/* mmu initialization (set page table address, set permissions, etc) */
-void mmu_init(void);
-
-enum dcache_policy {
- DCACHE_OFF,
- DCACHE_WRITEBACK,
- DCACHE_WRITETHROUGH,
-};
-
-/* disable the mmu for a range. Primarily useful to lock out address 0. */
-void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
-/* mmu range configuration (set dcache policy) */
-void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
- enum dcache_policy policy);
-
-#endif /* __MIPS_ARCH_CACHE_H__ */
diff --git a/payloads/libpayload/include/mips/arch/cpu.h b/payloads/libpayload/include/mips/arch/cpu.h
deleted file mode 100644
index 93e42ea455..0000000000
--- a/payloads/libpayload/include/mips/arch/cpu.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MIPS_ARCH_CPU_H__
-#define __MIPS_ARCH_CPU_H__
-
-/*
- * Reading at this address allows to identify the platform the code is running
- * on
- */
-
-/*
- * This register holds the FPGA image version
- * If we're not working on the FPGA this will be 0
- */
-#define PRIMARY_FPGA_VERSION 0xB8149060
-#define IMG_PLATFORM_ID() read32(PRIMARY_FPGA_VERSION)
-#define IMG_PLATFORM_ID_FPGA 0xD1400003 /* Last FPGA image */
-#define IMG_PLATFORM_ID_SILICON 0
-
-#define CP0_COUNT 9
-#define CP0_COMPARE 11
-#define CP0_STATUS 12
-#define CP0_CAUSE 13
-#define CP0_WATCHLO 18
-#define CP0_WATCHHI 19
-
-/* coprocessor 0 enable */
-#define ST0_CU0 (1 << 28)
-#define C0_CAUSE_DC (1 << 27)
-
-/***************************************************************************
- * The following section was copied from arch/mips/include/asm/mipsregs.h in
- * the 3.14 kernel tree.
- */
-
-/*
- * Macros to access the system control coprocessor
- */
-
-#define __read_32bit_c0_register(source, sel) \
-({ int __res; \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mfc0\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mfc0\t%0, " #source ", " #sel "\n\t" \
- ".set\tmips0\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __write_32bit_c0_register(register, sel, value) \
-do { \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mtc0\t%z0, " #register "\n\t" \
- : : "Jr" ((unsigned int)(value))); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mtc0\t%z0, " #register ", " #sel "\n\t" \
- ".set\tmips0" \
- : : "Jr" ((unsigned int)(value))); \
-} while (0)
-
-/* Shortcuts to access various internal registers, keep adding as needed. */
-#define read_c0_count() __read_32bit_c0_register($9, 0)
-#define write_c0_count(val) __write_32bit_c0_register($9, 0, (val))
-
-#define read_c0_cause() __read_32bit_c0_register($13, 0)
-#define write_c0_cause(val) __write_32bit_c0_register($13, 0, (val))
-/***************************************************************************/
-
-#endif /* __MIPS_ARCH_CPU_H__ */
diff --git a/payloads/libpayload/include/mips/arch/exception.h b/payloads/libpayload/include/mips/arch/exception.h
deleted file mode 100644
index 27f0b6417b..0000000000
--- a/payloads/libpayload/include/mips/arch/exception.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_EXCEPTION_H__
-#define __MIPS_ARCH_EXCEPTION_H__
-
-#include <stdint.h>
-
-void exception_init_asm(void);
-void exception_dispatch(void);
-
-struct exception_state_t {
- struct {
- /* Always 0: just to keep the series complete */
- u32 zero;
- /* Reserved for the assembler */
- /* TODO: is this actually needed here? */
- u32 at;
- /* v0-v1: expression evaluation */
- u32 v0;
- u32 v1;
- /* a0-a3: Arguments */
- u32 a0;
- u32 a1;
- u32 a2;
- u32 a3;
- /* t0-t3: Temporary registers for expression evaluation */
- u32 t0;
- u32 t1;
- u32 t2;
- u32 t3;
- u32 t4;
- u32 t5;
- u32 t6;
- u32 t7;
- /* s0-s7: Saved registers */
- u32 s0;
- u32 s1;
- u32 s2;
- u32 s3;
- u32 s4;
- u32 s5;
- u32 s6;
- u32 s7;
- /* t8-t9: Temporary registers for expression evaluation */
- u32 t8;
- u32 t9;
- /* k0-k1: reserved for SO kernel */
- u32 k0;
- u32 k1;
- /* Global pointer */
- u32 gp;
- /* Stack pointer */
- u32 sp;
- /* Frame pointer */
- u32 fp;
- /* Return address */
- u32 ra;
- } regs;
- u32 vector;
-} __packed;
-
-extern struct exception_state_t *exception_state_ptr;
-extern u32 *exception_stack_end;
-
-enum {
- EXC_CACHE_ERROR = 0,
- EXC_TLB_REFILL_AND_ALL = 1,
- EXC_INTERRUPT = 2,
- EXC_EJTAG_DEBUG = 3,
- EXC_COUNT
-};
-
-#endif /* __MIPS_ARCH_EXCEPTION_H__ */
diff --git a/payloads/libpayload/include/mips/arch/io.h b/payloads/libpayload/include/mips/arch/io.h
deleted file mode 100644
index f86f45fbd5..0000000000
--- a/payloads/libpayload/include/mips/arch/io.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * Based on arch/armv7/include/arch/io.h:
- * Copyright 2013 Google Inc.
- * Copyright (C) 1996-2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_IO_H__
-#define __MIPS_ARCH_IO_H__
-
-#include <arch/types.h>
-#include <arch/cache.h>
-#include <arch/byteorder.h>
-
-#define read8(a) (*(volatile uint8_t *) (a))
-#define read16(a) (*(volatile uint16_t *) (a))
-#define read32(a) (*(volatile uint32_t *) (a))
-
-#define write8(v, a) (*(volatile uint8_t *) (a) = (v))
-#define write16(v, a) (*(volatile uint16_t *) (a) = (v))
-#define write32(v, a) (*(volatile uint32_t *) (a) = (v))
-
-
-/*
- * Clear and set bits in one shot. These macros can be used to clear and
- * set multiple bits in a register using a single call. These macros can
- * also be used to set a multiple-bit bit pattern using a mask, by
- * specifying the mask in the 'clear' parameter and the new bit pattern
- * in the 'set' parameter.
- */
-
-#define out_arch(type, endian, a, v) write##type(cpu_to_##endian(v), a)
-#define in_arch(type, endian, a) endian##_to_cpu(read##type(a))
-
-#define readb(a) read8(a)
-#define readw(a) read16(a)
-#define readl(a) read32(a)
-
-#define inb(a) read8(a)
-#define inw(a) read16(a)
-#define inl(a) read32(a)
-
-#define writeb(v, a) write8(v, a)
-#define writew(v, a) write16(v, a)
-#define writel(v, a) write32(v, a)
-
-#define outb(v, a) write8(v, a)
-#define outw(v, a) write16(v, a)
-#define outl(v, a) write32(v, a)
-
-#endif /* __MIPS_ARCH_IO_H__ */
diff --git a/payloads/libpayload/include/mips/arch/stdint.h b/payloads/libpayload/include/mips/arch/stdint.h
deleted file mode 100644
index 18fa54f531..0000000000
--- a/payloads/libpayload/include/mips/arch/stdint.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Based on src/arch/armv7/include/stdint.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_STDINT_H__
-#define __MIPS_STDINT_H__
-
-#if defined(__GNUC__)
-#define __HAVE_LONG_LONG__ 1
-#else
-#define __HAVE_LONG_LONG__ 0
-#endif
-
-/* Exact integral types */
-typedef unsigned char uint8_t;
-typedef signed char int8_t;
-
-typedef unsigned short uint16_t;
-typedef signed short int16_t;
-
-typedef unsigned int uint32_t;
-typedef signed int int32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint64_t;
-typedef signed long long int64_t;
-#endif
-
-/* Small types */
-typedef unsigned char uint_least8_t;
-typedef signed char int_least8_t;
-
-typedef unsigned short uint_least16_t;
-typedef signed short int_least16_t;
-
-typedef unsigned int uint_least32_t;
-typedef signed int int_least32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_least64_t;
-typedef signed long long int_least64_t;
-#endif
-
-/* Fast Types */
-typedef unsigned char uint_fast8_t;
-typedef signed char int_fast8_t;
-
-typedef unsigned int uint_fast16_t;
-typedef signed int int_fast16_t;
-
-typedef unsigned int uint_fast32_t;
-typedef signed int int_fast32_t;
-
-#if __HAVE_LONG_LONG__
-typedef unsigned long long uint_fast64_t;
-typedef signed long long int_fast64_t;
-#endif
-
-/* Largest integral types */
-#if __HAVE_LONG_LONG__
-typedef long long int intmax_t;
-typedef unsigned long long uintmax_t;
-#else
-typedef long int intmax_t;
-typedef unsigned long int uintmax_t;
-#endif
-
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-#if __HAVE_LONG_LONG__
-typedef uint64_t u64;
-#endif
-typedef int8_t s8;
-typedef int16_t s16;
-typedef int32_t s32;
-
-#undef __HAVE_LONG_LONG__
-
-#endif /* __MIPS_STDINT_H__ */
diff --git a/payloads/libpayload/include/mips/arch/types.h b/payloads/libpayload/include/mips/arch/types.h
deleted file mode 100644
index afa3a37e87..0000000000
--- a/payloads/libpayload/include/mips/arch/types.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * Based on src/arch/armv7/include/arch/types.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_TYPES_H
-#define __MIPS_ARCH_TYPES_H
-
-#include <arch/stdint.h>
-
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__)
-__extension__ typedef __signed__ long long __s64;
-__extension__ typedef unsigned long long __u64;
-#endif
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32
-
-/* Dma addresses are 32-bits wide. */
-
-typedef u32 dma_addr_t;
-
-typedef unsigned long phys_addr_t;
-typedef unsigned long phys_size_t;
-
-typedef long time_t;
-typedef long suseconds_t;
-
-#ifndef NULL
-#define NULL ((void *)0)
-#endif
-
-#endif /* __MIPS_ARCH_TYPES_H */
diff --git a/payloads/libpayload/include/mips/arch/virtual.h b/payloads/libpayload/include/mips/arch/virtual.h
deleted file mode 100644
index da791eecdf..0000000000
--- a/payloads/libpayload/include/mips/arch/virtual.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright (C) 2014 Imagination Technologies
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_VIRTUAL_H
-#define __MIPS_ARCH_VIRTUAL_H
-
-#define KSEG0_BASE 0x80000000
-#define KSEG1_BASE 0xA0000000
-
-#define kseg0_to_phys(virt) ((unsigned long)(virt) - KSEG0_BASE)
-#define phys_to_kseg0(phys) ((void *)((unsigned long)(phys) + KSEG0_BASE))
-
-#define kseg1_to_phys(virt) ((unsigned long)(virt) - KSEG1_BASE)
-#define phys_to_kseg1(phys) ((void *)((unsigned long)(phys) + KSEG1_BASE))
-
-#define virt_to_phys(virt) ((unsigned long)(virt))
-#define phys_to_virt(phys) ((void *)(unsigned long)(phys))
-
-#define virt_to_bus(virt) kseg1_to_phys(virt)
-#define bus_to_virt(phys) phys_to_kseg1(phys)
-
-#endif
diff --git a/payloads/libpayload/libc/64bit_div.c b/payloads/libpayload/libc/64bit_div.c
deleted file mode 100644
index 5cd5bc5e95..0000000000
--- a/payloads/libpayload/libc/64bit_div.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright 2014 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <libpayload-config.h>
-#include <stdlib.h>
-
-#if !CONFIG(LP_LITTLE_ENDIAN)
-#error this code is for little endian only
-#endif
-
-union overlay64 {
- uint64_t longw;
- struct {
- uint32_t lower;
- uint32_t higher;
- } words;
-};
-
-
-uint64_t __ashldi3(uint64_t num, unsigned shift)
-{
- union overlay64 output;
-
- output.longw = num;
- if (shift >= 32) {
- output.words.higher = output.words.lower << (shift - 32);
- output.words.lower = 0;
- } else {
- if (!shift)
- return num;
- output.words.higher = (output.words.higher << shift) |
- (output.words.lower >> (32 - shift));
- output.words.lower = output.words.lower << shift;
- }
- return output.longw;
-}
-
-uint64_t __lshrdi3(uint64_t num, unsigned shift)
-{
- union overlay64 output;
-
- output.longw = num;
- if (shift >= 32) {
- output.words.lower = output.words.higher >> (shift - 32);
- output.words.higher = 0;
- } else {
- if (!shift)
- return num;
- output.words.lower = output.words.lower >> shift |
- (output.words.higher << (32 - shift));
- output.words.higher = output.words.higher >> shift;
- }
- return output.longw;
-}
-
-#define MAX_32BIT_UINT ((((uint64_t)1) << 32) - 1)
-
-static uint64_t _64bit_divide(uint64_t dividend,
- uint64_t divider, uint64_t *rem_p)
-{
- uint64_t result = 0;
-
- /*
- * If divider is zero - let the rest of the system care about the
- * exception.
- */
- if (!divider)
- return 1/(uint32_t)divider;
-
- /* As an optimization, let's not use 64 bit division unless we must. */
- if (dividend <= MAX_32BIT_UINT) {
- if (divider > MAX_32BIT_UINT) {
- result = 0;
- if (rem_p)
- *rem_p = divider;
- } else {
- result = (uint32_t) dividend / (uint32_t) divider;
- if (rem_p)
- *rem_p = (uint32_t) dividend %
- (uint32_t) divider;
- }
- return result;
- }
-
- while (divider <= dividend) {
- uint64_t locald = divider;
- uint64_t limit = __lshrdi3(dividend, 1);
- int shifts = 0;
-
- while (locald <= limit) {
- shifts++;
- locald = locald + locald;
- }
- result |= __ashldi3(1, shifts);
- dividend -= locald;
- }
-
- if (rem_p)
- *rem_p = dividend;
-
- return result;
-}
-
-uint64_t __udivdi3(uint64_t num, uint64_t den)
-{
- return _64bit_divide(num, den, NULL);
-}
-
-uint64_t __umoddi3(uint64_t num, uint64_t den)
-{
- uint64_t v = 0;
-
- _64bit_divide(num, den, &v);
- return v;
-}
diff --git a/payloads/libpayload/libc/Makefile.inc b/payloads/libpayload/libc/Makefile.inc
index edef62cc4d..348dc117ea 100644
--- a/payloads/libpayload/libc/Makefile.inc
+++ b/payloads/libpayload/libc/Makefile.inc
@@ -39,7 +39,3 @@ libc-$(CONFIG_LP_LIBC) += hexdump.c
libc-$(CONFIG_LP_LIBC) += die.c
libc-$(CONFIG_LP_LIBC) += coreboot.c
libc-$(CONFIG_LP_LIBC) += fmap.c
-
-ifeq ($(CONFIG_LP_ARCH_MIPS),y)
-libc-$(CONFIG_LP_LIBC) += 64bit_div.c
-endif
diff --git a/payloads/libpayload/sample/Makefile b/payloads/libpayload/sample/Makefile
index 18121dfe80..b67d876efa 100644
--- a/payloads/libpayload/sample/Makefile
+++ b/payloads/libpayload/sample/Makefile
@@ -34,7 +34,6 @@ include ../.xcompile
ARCH-$(CONFIG_LP_ARCH_ARM) := arm
ARCH-$(CONFIG_LP_ARCH_X86) := x86_32
ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64
-ARCH-$(CONFIG_LP_ARCH_MIPS) := mips
CC := $(CC_$(ARCH-y))
AS := $(AS_$(ARCH-y))
diff --git a/src/arch/mips/Kconfig b/src/arch/mips/Kconfig
deleted file mode 100644
index 9df514b21b..0000000000
--- a/src/arch/mips/Kconfig
+++ /dev/null
@@ -1,38 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; version 2 of
-# the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-config ARCH_MIPS
- bool
-
-if ARCH_MIPS
-
-config ARCH_BOOTBLOCK_MIPS
- bool
- default n
- select BOOTBLOCK_CUSTOM
- select C_ENVIRONMENT_BOOTBLOCK
-
-config ARCH_VERSTAGE_MIPS
- bool
- default n
-
-config ARCH_ROMSTAGE_MIPS
- bool
- default n
-
-config ARCH_RAMSTAGE_MIPS
- bool
- default n
-
-endif # if ARCH_MIPS
diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc
deleted file mode 100644
index 7130abaaa0..0000000000
--- a/src/arch/mips/Makefile.inc
+++ /dev/null
@@ -1,93 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; version 2 of
-# the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-###############################################################################
-# MIPS specific options
-###############################################################################
-
-ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y)
-check-ramstage-overlap-regions += stack
-endif
-
-###############################################################################
-# bootblock
-###############################################################################
-
-ifeq ($(CONFIG_ARCH_BOOTBLOCK_MIPS),y)
-
-bootblock-y += boot.c
-bootblock-y += bootblock.S
-bootblock-y += bootblock_simple.c
-bootblock-y += cache.c
-bootblock-y += mmu.c
-bootblock-y += stages.c
-bootblock-y += ../../lib/memcpy.c
-bootblock-y += ../../lib/memmove.c
-bootblock-y += ../../lib/memset.c
-
-# Much of the assembly code is generated by the compiler, and may contain
-# terms which the preprocessor will happily go on to replace. For example
-# "mips" would be replaced with "1". Clear all the built in definitions to
-# prevent that.
-bootblock-S-ccopts += -undef
-
-$(objcbfs)/bootblock.debug: $$(bootblock-objs) $(obj)/config.h
- @printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_bootblock) $(LDFLAGS_bootblock) -o $@ -L$(obj) -T $(call src-to-obj,bootblock,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(bootblock-objs)) --end-group
-
-endif # CONFIG_ARCH_BOOTBLOCK_MIPS
-
-###############################################################################
-# romstage
-###############################################################################
-
-ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y)
-
-romstage-y += boot.c
-romstage-y += cache.c
-romstage-y += mmu.c
-romstage-y += stages.c
-romstage-y += ../../lib/memcpy.c
-romstage-y += ../../lib/memmove.c
-romstage-y += ../../lib/memset.c
-
-$(objcbfs)/romstage.debug: $$(romstage-objs)
- @printf " LINK $(subst $(obj)/,,$(@))\n"
- $(LD_romstage) $(LDFLAGS_romstage) -o $@ -L$(obj) -T $(call src-to-obj,romstage,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(romstage-objs)) --end-group
-
-endif # CONFIG_ARCH_ROMSTAGE_MIPS
-
-###############################################################################
-# ramstage
-###############################################################################
-
-ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y)
-
-ramstage-y += ashldi3.c
-ramstage-y += boot.c
-ramstage-y += cache.c
-ramstage-y += mmu.c
-ramstage-y += stages.c
-ramstage-y += tables.c
-ramstage-y += ../../lib/memcpy.c
-ramstage-y += ../../lib/memmove.c
-ramstage-y += ../../lib/memset.c
-
-ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
-
-$(objcbfs)/ramstage.debug: $$(ramstage-objs)
- @printf " CC $(subst $(obj)/,,$(@))\n"
- $(LD_ramstage) $(LDFLAGS_ramstage) -o $@ -L$(obj) -T $(call src-to-obj,ramstage,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(ramstage-objs)) --end-group
-
-endif # CONFIG_ARCH_RAMSTAGE_MIPS
diff --git a/src/arch/mips/ashldi3.c b/src/arch/mips/ashldi3.c
deleted file mode 100644
index e3282f55ea..0000000000
--- a/src/arch/mips/ashldi3.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Based on linux arch/mips/lib/ashldi3.c
- */
-
-#ifndef __ORDER_LITTLE_ENDIAN__
-#errror "What endian are you!?"
-#endif
-
-typedef unsigned int word_type;
-long long __ashldi3(long long u, word_type b);
-
-struct DWstruct {
- int low, high;
-};
-typedef union {
- struct DWstruct s;
- long long ll;
-} DWunion;
-
-long long __ashldi3(long long u, word_type b)
-{
- DWunion uu, w;
- word_type bm;
-
- if (b == 0)
- return u;
-
- uu.ll = u;
- bm = 32 - b;
-
- if (bm <= 0) {
- w.s.low = 0;
- w.s.high = (unsigned int) uu.s.low << -bm;
- } else {
- const unsigned int carries = (unsigned int) uu.s.low >> bm;
-
- w.s.low = (unsigned int) uu.s.low << b;
- w.s.high = ((unsigned int) uu.s.high << b) | carries;
- }
-
- return w.ll;
-}
diff --git a/src/arch/mips/boot.c b/src/arch/mips/boot.c
deleted file mode 100644
index a8518cd094..0000000000
--- a/src/arch/mips/boot.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/stages.h>
-#include <program_loading.h>
-
-void arch_prog_run(struct prog *prog)
-{
- void *cb_tables = prog_entry_arg(prog);
- void (*doit)(void *) = prog_entry(prog);
-
- doit(cb_tables);
-}
diff --git a/src/arch/mips/bootblock.S b/src/arch/mips/bootblock.S
deleted file mode 100644
index 8ae1cfd7fa..0000000000
--- a/src/arch/mips/bootblock.S
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-.set noreorder /* Prevent assembler from "optimizing" this code. */
-
-.section ".text._start", "ax", %progbits
-.globl _start
-_start:
- /* Set the stack pointer */
- la $sp, _estack
-
- /*
- * Initialise the stack to a known value, used later to check for
- * overflow.
- */
- la $t0, _stack
- addi $t1, $sp, -4
- li $t2, 0xdeadbeef
-1: sw $t2, 0($t0)
- bne $t0, $t1, 1b
- addi $t0, $t0, 4
-
- /* Run main */
- b mips_main
-
- /*
- * Should never return from main. Make sure there is no branch in the
- * branch delay slot.
- */
-2: nop
- b 2b
- nop /* Make sure there is no branch after this either. */
diff --git a/src/arch/mips/bootblock_simple.c b/src/arch/mips/bootblock_simple.c
deleted file mode 100644
index be0b176b90..0000000000
--- a/src/arch/mips/bootblock_simple.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/bootblock_common.h>
-#include <console/console.h>
-#include <halt.h>
-#include <program_loading.h>
-
-/* called from assembly in bootblock.S */
-void mips_main(void);
-
-void mips_main(void)
-{
- bootblock_cpu_init();
-
- /* Mainboard basic init */
- bootblock_mainboard_init();
-
-#if CONFIG(BOOTBLOCK_CONSOLE)
- console_init();
-#endif
-
- bootblock_mmu_init();
-
- if (init_extra_hardware())
- printk(BIOS_ERR, "bootblock_simple: failed to init HW.\n");
- else
- run_romstage();
-
- halt();
-}
diff --git a/src/arch/mips/cache.c b/src/arch/mips/cache.c
deleted file mode 100644
index 2b56174898..0000000000
--- a/src/arch/mips/cache.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/cache.h>
-#include <arch/cpu.h>
-#include <console/console.h>
-#include <program_loading.h>
-#include <symbols.h>
-
-/* cache_op: issues cache operation for specified address */
-#define cache_op(op, addr) \
-({ \
- __asm__ __volatile__( \
- ".set push\n\t" \
- ".set noreorder\n\t" \
- ".set mips32\n\t" \
- "cache %0, %1\n\t" \
- ".set mips0\n\t" \
- ".set pop\n\t" \
- : \
- : "i" (op), "R" (*(unsigned char *)(addr))); \
-})
-
-#define MIPS_CONFIG1_DL_SHIFT 10
-#define MIPS_CONFIG1_DL_MASK (0x00000007)
-#define MIPS_CONFIG1_IL_SHIFT 19
-#define MIPS_CONFIG1_IL_MASK (0x00000007)
-#define MIPS_CONFIG2_SL_SHIFT 4
-#define MIPS_CONFIG2_SL_MASK (0x0000000F)
-
-/*
- * get_cache_line_size:
- * Read config register
- * Isolate instruction cache line size
- * Interpret value as per MIPS manual: 2 << value
- * Return cache line size
- */
-static int get_cache_line_size(uint8_t type)
-{
- switch (type) {
- case ICACHE:
- return 2 << ((read_c0_config1() >> MIPS_CONFIG1_IL_SHIFT) &
- MIPS_CONFIG1_IL_MASK);
- case DCACHE:
- return 2 << ((read_c0_config1() >> MIPS_CONFIG1_DL_SHIFT) &
- MIPS_CONFIG1_DL_MASK);
- case L2CACHE:
- return 2 << ((read_c0_config2() >> MIPS_CONFIG2_SL_SHIFT) &
- MIPS_CONFIG2_SL_MASK);
- default:
- printk(BIOS_ERR, "%s: Error: unsupported cache type.\n",
- __func__);
- return 0;
- }
- return 0;
-}
-
-void perform_cache_operation(uintptr_t start, size_t size, uint8_t operation)
-{
- u32 line_size, line_mask;
- uintptr_t end;
-
- line_size = get_cache_line_size((operation >> CACHE_TYPE_SHIFT) &
- CACHE_TYPE_MASK);
- if (!line_size)
- return;
- line_mask = ~(line_size-1);
- end = (start + (line_size - 1) + size) & line_mask;
- start &= line_mask;
- if ((operation & L2CACHE) == L2CACHE)
- write_c0_l23taglo(0);
- while (start < end) {
- switch (operation) {
- case CACHE_CODE(ICACHE, WB_INVD):
- cache_op(CACHE_CODE(ICACHE, WB_INVD), start);
- break;
- case CACHE_CODE(DCACHE, WB_INVD):
- cache_op(CACHE_CODE(DCACHE, WB_INVD), start);
- break;
- case CACHE_CODE(L2CACHE, WB_INVD):
- cache_op(CACHE_CODE(L2CACHE, WB_INVD), start);
- break;
- default:
- return;
- }
- start += line_size;
- }
- asm("sync");
-}
-
-void cache_invalidate_all(uintptr_t start, size_t size)
-{
- perform_cache_operation(start, size, CACHE_CODE(ICACHE, WB_INVD));
- perform_cache_operation(start, size, CACHE_CODE(DCACHE, WB_INVD));
- perform_cache_operation(start, size, CACHE_CODE(L2CACHE, WB_INVD));
-}
-
-void arch_segment_loaded(uintptr_t start, size_t size, int flags)
-{
- cache_invalidate_all(start, size);
- if (flags & SEG_FINAL)
- cache_invalidate_all((uintptr_t)_cbfs_cache,
- REGION_SIZE(cbfs_cache));
-}
diff --git a/src/arch/mips/include/arch/bootblock_common.h b/src/arch/mips/include/arch/bootblock_common.h
deleted file mode 100644
index b930b5c4e7..0000000000
--- a/src/arch/mips/include/arch/bootblock_common.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#endif
-
-#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#include CONFIG_BOOTBLOCK_MAINBOARD_INIT
-#else
-static void bootblock_mainboard_init(void)
-{
-}
-#endif
diff --git a/src/arch/mips/include/arch/byteorder.h b/src/arch/mips/include/arch/byteorder.h
deleted file mode 100644
index 7c0ce47176..0000000000
--- a/src/arch/mips/include/arch/byteorder.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_BYTEORDER_H
-#define __MIPS_ARCH_BYTEORDER_H
-
-#ifndef __ORDER_LITTLE_ENDIAN__
-#errror "What endian are you!?"
-#endif
-
-#define __LITTLE_ENDIAN 1234
-
-#endif /* __MIPS_ARCH_BYTEORDER_H */
diff --git a/src/arch/mips/include/arch/cache.h b/src/arch/mips/include/arch/cache.h
deleted file mode 100644
index c610c991cf..0000000000
--- a/src/arch/mips/include/arch/cache.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_CACHE_H
-#define __MIPS_ARCH_CACHE_H
-
-#include <stddef.h>
-#include <stdint.h>
-
-#define CACHE_TYPE_SHIFT (0)
-#define CACHE_OP_SHIFT (2)
-#define CACHE_TYPE_MASK (0x3)
-#define CACHE_OP_MASK (0x7)
-
-/* Cache type */
-#define ICACHE 0x00
-#define DCACHE 0x01
-#define L2CACHE 0x03
-
-/* Cache operation*/
-#define WB_INVD 0x05
-
-#define CACHE_CODE(type, op) ((((type) & (CACHE_TYPE_MASK)) << \
- (CACHE_TYPE_SHIFT)) | \
- (((op) & (CACHE_OP_MASK)) << (CACHE_OP_SHIFT)))
-
-/* Perform cache operation on cache lines for target addresses */
-void perform_cache_operation(uintptr_t start, size_t size, uint8_t operation);
-/* Invalidate all caches: instruction, data, L2 data */
-void cache_invalidate_all(uintptr_t start, size_t size);
-
-/* TODO: Global cache API. Implement properly once we finally have a MIPS board
- again where we can figure out what exactly these should be doing. */
-static inline void dcache_clean_all(void) {}
-static inline void dcache_invalidate_all(void) {}
-static inline void dcache_clean_invalidate_all(void) {}
-
-#endif /* __MIPS_ARCH_CACHE_H */
diff --git a/src/arch/mips/include/arch/cbconfig.h b/src/arch/mips/include/arch/cbconfig.h
deleted file mode 100644
index 35c1387895..0000000000
--- a/src/arch/mips/include/arch/cbconfig.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _ARCH_CBCONFIG_H_
-#define _ARCH_CBCONFIG_H_
-
-/*
- * Instead of using Kconfig variables for internal coreboot infrastructure
- * variables that are architecture dependent land those things in this file.
- * If it's not obvious all variables that are used in the common code need
- * to have the same name across all architectures.
- */
-
-#define COREBOOT_TABLE_SIZE 0x2000
-
-#endif
diff --git a/src/arch/mips/include/arch/cpu.h b/src/arch/mips/include/arch/cpu.h
deleted file mode 100644
index 61eb0828cf..0000000000
--- a/src/arch/mips/include/arch/cpu.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_CPU_H
-#define __MIPS_ARCH_CPU_H
-
-#include <device/device.h>
-
-#define asmlinkage
-
-struct cpu_driver {
- struct device_operations *ops;
- const struct cpu_device_id *id_table;
-};
-
-struct thread;
-
-struct cpu_info {
- struct device *cpu;
- unsigned long index;
-};
-
-
-/***************************************************************************
- * The following section was copied from arch/mips/include/asm/mipsregs.h in
- * the 3.14 kernel tree.
- */
-
-/*
- * Macros to access the system control coprocessor
- */
-
-#define __read_32bit_c0_register(source, sel) \
-({ int __res; \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mfc0\t%0, " #source "\n\t" \
- : "=r" (__res)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mfc0\t%0, " #source ", " #sel "\n\t" \
- ".set\tmips0\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#define __write_32bit_c0_register(register, sel, value) \
-do { \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mtc0\t%z0, " #register "\n\t" \
- : : "Jr" ((unsigned int)(value))); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mtc0\t%z0, " #register ", " #sel "\n\t" \
- ".set\tmips0" \
- : : "Jr" ((unsigned int)(value))); \
-} while (0)
-
-/* Shortcuts to access various internal registers, keep adding as needed. */
-#define read_c0_index() __read_32bit_c0_register($0, 0)
-#define write_c0_index(val) __write_32bit_c0_register($0, 0, (val))
-
-#define read_c0_entrylo0() __read_32bit_c0_register($2, 0)
-#define write_c0_entrylo0(val) __write_32bit_c0_register($2, 0, (val))
-
-#define read_c0_entrylo1() __read_32bit_c0_register($3, 0)
-#define write_c0_entrylo1(val) __write_32bit_c0_register($3, 0, (val))
-
-#define read_c0_pagemask() __read_32bit_c0_register($5, 0)
-#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, (val))
-
-#define read_c0_wired() __read_32bit_c0_register($6, 0)
-#define write_c0_wired(val) __write_32bit_c0_register($6, 0, (val))
-
-#define read_c0_count() __read_32bit_c0_register($9, 0)
-#define write_c0_count(val) __write_32bit_c0_register($9, 0, (val))
-
-#define read_c0_entryhi() __read_32bit_c0_register($10, 0)
-#define write_c0_entryhi(val) __write_32bit_c0_register($10, 0, (val))
-
-#define read_c0_cause() __read_32bit_c0_register($13, 0)
-#define write_c0_cause(val) __write_32bit_c0_register($13, 0, (val))
-
-#define read_c0_config1() __read_32bit_c0_register($16, 1)
-#define write_c0_config1(val) __write_32bit_c0_register($16, 1, (val))
-
-#define read_c0_config2() __read_32bit_c0_register($16, 2)
-#define write_c0_config2(val) __write_32bit_c0_register($16, 2, (val))
-
-#define read_c0_l23taglo() __read_32bit_c0_register($28, 4)
-#define write_c0_l23taglo(val) __write_32bit_c0_register($28, 4, (val))
-
-
-#define C0_ENTRYLO_PFN_SHIFT 6
-
-#define C0_ENTRYLO_COHERENCY_MASK 0x00000038
-#define C0_ENTRYLO_COHERENCY_SHIFT 3
-/* Cacheable, write-back, non-coherent */
-#define C0_ENTRYLO_COHERENCY_WB (0x3 << C0_ENTRYLO_COHERENCY_SHIFT)
-/* Uncached, non-coherent */
-#define C0_ENTRYLO_COHERENCY_UC (0x2 << C0_ENTRYLO_COHERENCY_SHIFT)
-
-/* Writeable */
-#define C0_ENTRYLO_D (0x1 << 2)
-/* Valid */
-#define C0_ENTRYLO_V (0x1 << 1)
-/* Global */
-#define C0_ENTRYLO_G (0x1 << 0)
-
-#define C0_PAGEMASK_SHIFT 13
-#define C0_PAGEMASK_MASK 0xffff
-
-#define C0_WIRED_MASK 0x3f
-
-#define C0_CAUSE_DC (1 << 27)
-
-#define C0_CONFIG1_MMUSIZE_SHIFT 25
-#define C0_CONFIG1_MMUSIZE_MASK 0x3f
-
-/* Hazard handling */
-static inline void __nop(void)
-{
- __asm__ __volatile__("nop");
-}
-
-static inline void __ssnop(void)
-{
- __asm__ __volatile__("sll\t$0, $0, 1");
-}
-
-#define mtc0_tlbw_hazard() \
-do { \
- __nop(); \
- __nop(); \
-} while (0)
-
-#define tlbw_use_hazard() \
-do { \
- __nop(); \
- __nop(); \
- __nop(); \
-} while (0)
-
-#define tlb_probe_hazard() \
-do { \
- __nop(); \
- __nop(); \
- __nop(); \
-} while (0)
-
-#define back_to_back_c0_hazard() \
-do { \
- __ssnop(); \
- __ssnop(); \
- __ssnop(); \
-} while (0)
-/**************************************************************************/
-
-#endif /* __MIPS_ARCH_CPU_H */
diff --git a/src/arch/mips/include/arch/early_variables.h b/src/arch/mips/include/arch/early_variables.h
deleted file mode 100644
index 6ad82606c4..0000000000
--- a/src/arch/mips/include/arch/early_variables.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_EARLY_VARIABLES_H
-#define __MIPS_ARCH_EARLY_VARIABLES_H
-
-#define CAR_GLOBAL
-#define CAR_MIGRATE(migrate_fn_)
-
-static inline void *car_get_var_ptr(void *var) { return var; }
-#define car_get_var(var) (var)
-#define car_set_var(var, val) { (var) = (val); }
-
-#define car_get_ptr car_get_var
-#define car_set_ptr car_set_var
-
-#endif /* __MIPS_ARCH_EARLY_VARIABLES_H */
diff --git a/src/arch/mips/include/arch/exception.h b/src/arch/mips/include/arch/exception.h
deleted file mode 100644
index a0ab9ecebd..0000000000
--- a/src/arch/mips/include/arch/exception.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_EXCEPTION_H
-#define __MIPS_ARCH_EXCEPTION_H
-
-static inline void exception_init(void) {}
-
-#endif /* __MIPS_ARCH_EXCEPTION_H */
diff --git a/src/arch/mips/include/arch/header.ld b/src/arch/mips/include/arch/header.ld
deleted file mode 100644
index 7f832eb51c..0000000000
--- a/src/arch/mips/include/arch/header.ld
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* We use ELF as output format. So that we can debug the code in some form. */
-OUTPUT_ARCH(mips)
-
-PHDRS
-{
- to_load PT_LOAD;
-}
-
-#if ENV_BOOTBLOCK
-ENTRY(_start)
-#else
-ENTRY(stage_entry)
-#endif
diff --git a/src/arch/mips/include/arch/hlt.h b/src/arch/mips/include/arch/hlt.h
deleted file mode 100644
index 5feafe2b85..0000000000
--- a/src/arch/mips/include/arch/hlt.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_HLT_H
-#define __MIPS_ARCH_HLT_H
-
-static inline __always_inline void hlt(void)
-{
- for (;;)
- ;
-}
-
-#endif /* __MIPS_ARCH_HLT_H */
diff --git a/src/arch/mips/include/arch/memlayout.h b/src/arch/mips/include/arch/memlayout.h
deleted file mode 100644
index bf862a30ea..0000000000
--- a/src/arch/mips/include/arch/memlayout.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* This file contains macro definitions for memlayout.ld linker scripts. */
-
-#ifndef __ARCH_MEMLAYOUT_H
-#define __ARCH_MEMLAYOUT_H
-
-/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */
-/* TODO: Double-check that that's the correct alignment for our ABI. */
-#define STACK(addr, size) \
- REGION(stack, addr, size, 8) \
- _ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
-
-#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K)
-
-#define SOC_REGISTERS(addr, size) REGION(soc_registers, addr, size, 4)
-
-#endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/mips/include/arch/mmio.h b/src/arch/mips/include/arch/mmio.h
deleted file mode 100644
index 2564e3b60d..0000000000
--- a/src/arch/mips/include/arch/mmio.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ARCH_MMIO_H__
-#define __ARCH_MMIO_H__
-
-#include <types.h>
-#include <arch/cache.h>
-#include <endian.h>
-
-static inline uint8_t read8(const volatile void *addr)
-{
- asm("sync");
- return *(volatile uint8_t *)addr;
-}
-
-static inline uint16_t read16(const volatile void *addr)
-{
- asm("sync");
- return *(volatile uint16_t *)addr;
-}
-
-static inline uint32_t read32(const volatile void *addr)
-{
- asm("sync");
- return *(volatile uint32_t *)addr;
-}
-
-static inline void write8(volatile void *addr, uint8_t val)
-{
- asm("sync");
- *(volatile uint8_t *)addr = val;
- asm("sync");
-}
-
-static inline void write16(volatile void *addr, uint16_t val)
-{
- asm("sync");
- *(volatile uint16_t *)addr = val;
- asm("sync");
-}
-
-static inline void write32(volatile void *addr, uint32_t val)
-{
- asm("sync");
- *(volatile uint32_t *)addr = val;
- asm("sync");
-}
-
-/* Fixing soc/imgtech/pistachio seemed painful at the time. */
-#define read32_x(addr) read32((void *)(addr))
-#define write32_x(addr, val) write32((void *)(addr), (val))
-
-#endif /* __MIPS_ARCH_IO_H */
diff --git a/src/arch/mips/include/arch/mmu.h b/src/arch/mips/include/arch/mmu.h
deleted file mode 100644
index f7377bb88c..0000000000
--- a/src/arch/mips/include/arch/mmu.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_MMU_H
-#define __MIPS_ARCH_MMU_H
-
-#include <arch/cpu.h>
-#include <stddef.h>
-#include <stdint.h>
-
-static inline void tlb_write_indexed(void)
-{
- __asm__ __volatile__(
- ".set noreorder\n\t"
- "tlbwi\n\t"
- ".set reorder");
-}
-
-static inline uint32_t get_max_pagesize(void)
-{
- uint32_t max_pgsize;
-
- write_c0_pagemask(C0_PAGEMASK_MASK << C0_PAGEMASK_SHIFT);
- back_to_back_c0_hazard();
- max_pgsize = (((read_c0_pagemask() >> C0_PAGEMASK_SHIFT) &
- C0_PAGEMASK_MASK) + 1) * 4 * KiB;
-
- return max_pgsize;
-}
-
-static inline uint32_t get_tlb_size(void)
-{
- uint32_t tlbsize;
-
- tlbsize = ((read_c0_config1() >> C0_CONFIG1_MMUSIZE_SHIFT) &
- C0_CONFIG1_MMUSIZE_MASK) + 1;
-
- return tlbsize;
-}
-
-int identity_map(uint32_t start, size_t len, uint32_t coherency);
-
-#endif /* __MIPS_ARCH_MMU_H */
diff --git a/src/arch/mips/include/arch/pci_ops.h b/src/arch/mips/include/arch/pci_ops.h
deleted file mode 100644
index da397cf3b8..0000000000
--- a/src/arch/mips/include/arch/pci_ops.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef ARCH_MIPS_PCI_OPS_H
-#define ARCH_MIPS_PCI_OPS_H
-
-#include <device/pci_mmio_cfg.h>
-
-#endif
diff --git a/src/arch/mips/include/arch/stages.h b/src/arch/mips/include/arch/stages.h
deleted file mode 100644
index 3da02da1ca..0000000000
--- a/src/arch/mips/include/arch/stages.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_STAGES_H
-#define __MIPS_ARCH_STAGES_H
-
-#include <stdint.h>
-#include <main_decl.h>
-
-void stage_entry(uintptr_t stage_arg);
-
-#endif /* __MIPS_ARCH_STAGES_H */
diff --git a/src/arch/mips/include/arch/types.h b/src/arch/mips/include/arch/types.h
deleted file mode 100644
index fa14b6a684..0000000000
--- a/src/arch/mips/include/arch/types.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MIPS_ARCH_TYPES_H
-#define __MIPS_ARCH_TYPES_H
-
-typedef unsigned short umode_t;
-
-/*
- * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
- * header files exported to user space
- */
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__)
-__extension__ typedef __signed__ long long __s64;
-__extension__ typedef unsigned long long __u64;
-#endif
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-#define BITS_PER_LONG 32
-
-/* Dma addresses are 32-bits wide. */
-
-typedef u32 dma_addr_t;
-
-typedef unsigned long phys_addr_t;
-typedef unsigned long phys_size_t;
-
-#endif /* __MIPS_ARCH_TYPES_H */
diff --git a/src/arch/mips/mmu.c b/src/arch/mips/mmu.c
deleted file mode 100644
index 5ef276d273..0000000000
--- a/src/arch/mips/mmu.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/mmu.h>
-#include <console/console.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <stdlib.h>
-
-#define MIN_PAGE_SIZE (4 * KiB)
-
-static int add_wired_tlb_entry(uint32_t entrylo0, uint32_t entrylo1,
- uint32_t entryhi, uint32_t pgsize)
-{
- uint32_t tlbindex;
-
- tlbindex = read_c0_wired();
- if (tlbindex >= get_tlb_size() || tlbindex >= C0_WIRED_MASK) {
- printk(BIOS_ERR, "Ran out of TLB entries\n");
- return -1;
- }
- write_c0_wired(tlbindex + 1);
- write_c0_index(tlbindex);
- write_c0_pagemask(((pgsize / MIN_PAGE_SIZE) - 1) << C0_PAGEMASK_SHIFT);
- write_c0_entryhi(entryhi);
- write_c0_entrylo0(entrylo0);
- write_c0_entrylo1(entrylo1);
- mtc0_tlbw_hazard();
- tlb_write_indexed();
- tlbw_use_hazard();
-
- return 0;
-}
-
-static uint32_t pick_pagesize(uint32_t start, uint32_t len)
-{
- uint32_t pgsize, max_pgsize;
-
- max_pgsize = get_max_pagesize();
- for (pgsize = max_pgsize;
- pgsize >= MIN_PAGE_SIZE;
- pgsize = pgsize / 4) {
- /*
- * Each TLB entry maps a pair of virtual pages. To avoid
- * aliasing, pick the largest page size that is at most
- * half the size of the region we're trying to map.
- */
- if (IS_ALIGNED(start, 2 * pgsize) && (2 * pgsize <= len))
- break;
- }
-
- return pgsize;
-}
-
-/*
- * Identity map the memory from [start,start+len] in the TLB using the
- * largest suitable page size so as to conserve TLB entries.
- */
-int identity_map(uint32_t start, size_t len, uint32_t coherency)
-{
- uint32_t pgsize, pfn, entryhi, entrylo0, entrylo1;
-
- coherency &= C0_ENTRYLO_COHERENCY_MASK;
- while (len > 0) {
- pgsize = pick_pagesize(start, len);
- entryhi = start;
- pfn = start >> 12;
- entrylo0 = (pfn << C0_ENTRYLO_PFN_SHIFT) | coherency |
- C0_ENTRYLO_D | C0_ENTRYLO_V | C0_ENTRYLO_G;
- start += pgsize;
- len -= MIN(len, pgsize);
- if (len >= pgsize) {
- pfn = start >> 12;
- entrylo1 = (pfn << C0_ENTRYLO_PFN_SHIFT) |
- coherency | C0_ENTRYLO_D | C0_ENTRYLO_V |
- C0_ENTRYLO_G;
- start += pgsize;
- len -= MIN(len, pgsize);
- } else {
- entrylo1 = 0;
- }
- if (add_wired_tlb_entry(entrylo0, entrylo1, entryhi, pgsize))
- return -1;
- }
-
- return 0;
-}
diff --git a/src/arch/mips/stages.c b/src/arch/mips/stages.c
deleted file mode 100644
index bf31153d98..0000000000
--- a/src/arch/mips/stages.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cbmem.h>
-#include <arch/stages.h>
-#include <arch/cache.h>
-
-void stage_entry(uintptr_t stage_arg)
-{
- if (!ENV_ROMSTAGE_OR_BEFORE)
- _cbmem_top_ptr = stage_arg;
- main();
-}
diff --git a/src/arch/mips/tables.c b/src/arch/mips/tables.c
deleted file mode 100644
index e9de4bfd71..0000000000
--- a/src/arch/mips/tables.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <bootmem.h>
-#include <boot/tables.h>
-#include <boot/coreboot_tables.h>
-
-void arch_write_tables(uintptr_t coreboot_table)
-{
-}
-
-void bootmem_arch_add_ranges(void)
-{
-}
-
-void lb_arch_add_records(struct lb_header *header)
-{
-}
diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c
index 1efe55a332..b9e43692d8 100644
--- a/src/console/vtxprintf.c
+++ b/src/console/vtxprintf.c
@@ -20,10 +20,6 @@
#define call_tx(x) tx_byte(x, data)
-#if !CONFIG(ARCH_MIPS)
-#define SUPPORT_64BIT_INTS
-#endif
-
#define ZEROPAD 1 /* pad with zero */
#define SIGN 2 /* unsigned/signed long */
#define PLUS 4 /* show plus */
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 66ee2f9169..bf857f8ffe 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -4,7 +4,6 @@
subdirs-y += allwinner
subdirs-y += amd
subdirs-y += armltd
-subdirs-y += imgtec
subdirs-y += intel
subdirs-y += ti
subdirs-y += via
diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c
index fca61004ff..c68b9061f8 100644
--- a/src/drivers/spi/cbfs_spi.c
+++ b/src/drivers/spi/cbfs_spi.c
@@ -53,7 +53,7 @@ static ssize_t spi_readat(const struct region_device *rd, void *b,
u64 speed; /* KiB/s */
int bps; /* Bits per second */
- speed = size * 1000 / usecs;
+ speed = size * (u64)1000 / usecs;
bps = speed * 8;
printk(BIOS_DEBUG, "read SPI %#zx %#zx: %ld us, %lld KB/s, %d.%03d Mbps\n",
diff --git a/src/include/rules.h b/src/include/rules.h
index 0436198363..9e13ee65a6 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -173,7 +173,6 @@
#define ENV_ARMV7 0
#endif
#define ENV_ARMV8 0
-#define ENV_MIPS 0
#define ENV_RISCV 0
#define ENV_X86 0
#define ENV_X86_32 0
@@ -189,19 +188,6 @@
#else
#define ENV_ARMV8 0
#endif
-#define ENV_MIPS 0
-#define ENV_RISCV 0
-#define ENV_X86 0
-#define ENV_X86_32 0
-#define ENV_X86_64 0
-
-#elif defined(__ARCH_mips__)
-#define ENV_ARM 0
-#define ENV_ARM64 0
-#define ENV_ARMV4 0
-#define ENV_ARMV7 0
-#define ENV_ARMV8 0
-#define ENV_MIPS 1
#define ENV_RISCV 0
#define ENV_X86 0
#define ENV_X86_32 0
@@ -213,7 +199,6 @@
#define ENV_ARMV4 0
#define ENV_ARMV7 0
#define ENV_ARMV8 0
-#define ENV_MIPS 0
#define ENV_RISCV 1
#define ENV_X86 0
#define ENV_X86_32 0
@@ -225,7 +210,6 @@
#define ENV_ARMV4 0
#define ENV_ARMV7 0
#define ENV_ARMV8 0
-#define ENV_MIPS 0
#define ENV_RISCV 0
#define ENV_X86 1
#define ENV_X86_32 1
@@ -237,7 +221,6 @@
#define ENV_ARMV4 0
#define ENV_ARMV7 0
#define ENV_ARMV8 0
-#define ENV_MIPS 0
#define ENV_RISCV 0
#define ENV_X86 1
#define ENV_X86_32 0
@@ -249,7 +232,6 @@
#define ENV_ARMV4 0
#define ENV_ARMV7 0
#define ENV_ARMV8 0
-#define ENV_MIPS 0
#define ENV_RISCV 0
#define ENV_X86 0
#define ENV_X86_32 0
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 05acdeec9a..b509af7483 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -23,8 +23,7 @@ ramstage-$(CONFIG_HAVE_REGULATORY_DOMAIN) += wrdd.c
ramstage-$(CONFIG_USE_SAR) += sar.c
ramstage-$(CONFIG_CHROMEOS_DSM_CALIB) += dsm_calib.c
ramstage-$(CONFIG_TPM_CR50) += cr50_enable_update.c
-ifeq ($(CONFIG_ARCH_MIPS),)
+
bootblock-y += watchdog.c
verstage-y += watchdog.c
ramstage-y += watchdog.c
-endif
diff --git a/toolchain.inc b/toolchain.inc
index 4c0408ccfd..af085b4cad 100644
--- a/toolchain.inc
+++ b/toolchain.inc
@@ -56,12 +56,10 @@ ARCHDIR-x86_64 := x86
ARCHDIR-arm := arm
ARCHDIR-arm64 := arm64
ARCHDIR-riscv := riscv
-ARCHDIR-mips := mips
ARCHDIR-ppc64 := ppc64
CFLAGS_arm +=
CFLAGS_arm64 += -mgeneral-regs-only
-CFLAGS_mips += -mips32r2 -G 0 -mno-abicalls -fno-pic
CFLAGS_riscv +=
CFLAGS_x86_32 +=
CFLAGS_x86_64 += -mcmodel=large -mno-red-zone
@@ -83,7 +81,6 @@ CFLAGS_ppc64 +=
ifeq ($(CONFIG_COMPILER_GCC),y)
CFLAGS_arm += -Wstack-usage=1536
CFLAGS_arm64 += -Wstack-usage=1536
-CFLAGS_mips += -Wstack-usage=1536
CFLAGS_riscv += -Wstack-usage=1536
CFLAGS_ppc64 += -Wstack-usage=1536
endif
diff --git a/util/README.md b/util/README.md
index 470013ed25..55bcaab637 100644
--- a/util/README.md
+++ b/util/README.md
@@ -9,9 +9,6 @@ settings. `Perl`
platform. `C`
* __autoport__ - Automated porting coreboot to Sandy Bridge/Ivy Bridge
platforms `Go`
-* __bimgtool__ - A simple tool which generates and verifies boot images
-in the BIMG format, used in systems designed by Imagination
-Technologies, for example the Pistachio SoC. `C`
* __bincfg__ - Compiler/Decompiler for data blobs with specs `Lex`
`Yacc`
* __board_status__ - Tools to collect logs and upload them to the board
diff --git a/util/cbfstool/cbfs.h b/util/cbfstool/cbfs.h
index 4bc95ab4da..f0c215d0d7 100644
--- a/util/cbfstool/cbfs.h
+++ b/util/cbfstool/cbfs.h
@@ -65,7 +65,7 @@ struct cbfs_header {
#define CBFS_ARCHITECTURE_X86 0x00000001
#define CBFS_ARCHITECTURE_ARM 0x00000010
#define CBFS_ARCHITECTURE_AARCH64 0x0000aa64
-#define CBFS_ARCHITECTURE_MIPS 0x00000100
+#define CBFS_ARCHITECTURE_MIPS 0x00000100 /* deprecated */
#define CBFS_ARCHITECTURE_RISCV 0xc001d0de
#define CBFS_ARCHITECTURE_PPC64 0x407570ff
diff --git a/util/crossgcc/Makefile b/util/crossgcc/Makefile
index c4f4262e87..db8b769287 100644
--- a/util/crossgcc/Makefile
+++ b/util/crossgcc/Makefile
@@ -8,12 +8,12 @@ DEST ?= $(CURDIR)/xgcc
# Example: BUILDGCC_OPTIONS=-c to remove temporary files before build
all all_with_gdb:
- $(MAKE) build-i386 build-x64 build-arm build-mips \
+ $(MAKE) build-i386 build-x64 build-arm \
build-riscv build-aarch64 build-ppc64 build-nds32le \
build_clang build_iasl build_make build_nasm
all_without_gdb:
- $(MAKE) SKIP_GDB=1 build-i386 build-x64 build-arm build-mips \
+ $(MAKE) SKIP_GDB=1 build-i386 build-x64 build-arm \
build-riscv build-aarch64 build-ppc64 build-nds32le \
build_clang build_iasl build_make build_nasm
@@ -59,9 +59,6 @@ build-arm:
build-aarch64:
@$(MAKE) build_tools BUILD_PLATFORM=aarch64-elf
-build-mips:
- @$(MAKE) build_tools BUILD_PLATFORM=mipsel-elf
-
build-riscv:
# GDB is currently not supported on RISC-V
@$(MAKE) build_gcc BUILD_PLATFORM=riscv-elf
@@ -88,7 +85,6 @@ distclean: clean
.PHONY: build_gcc build_iasl build_gdb build_clang all all_with_gdb \
all_without_gdb build_tools build-i386 build-x64 build-arm \
- build-aarch64 build-mips build-riscv build-ppc64 build-nds32le \
- build-nasm \
+ build-aarch64 build-riscv build-ppc64 build-nds32le build-nasm \
clean distclean clean_tempfiles
.NOTPARALLEL:
diff --git a/util/crossgcc/Makefile.inc b/util/crossgcc/Makefile.inc
index 0ef6b9c1e3..108612fd0a 100644
--- a/util/crossgcc/Makefile.inc
+++ b/util/crossgcc/Makefile.inc
@@ -13,7 +13,7 @@
## GNU General Public License for more details.
##
-TOOLCHAIN_ARCHES := i386 x64 arm aarch64 mips riscv ppc64 nds32le
+TOOLCHAIN_ARCHES := i386 x64 arm aarch64 riscv ppc64 nds32le
help_toolchain help::
@echo '*** Toolchain targets ***'
@@ -39,9 +39,9 @@ crossgcc: clean-for-update
$(MAKE) -C util/crossgcc all_without_gdb SKIP_CLANG=1
.PHONY: crossgcc crossgcc-i386 crossgcc-x64 crossgcc-arm crossgcc-aarch64 \
- crossgcc-mips crossgcc-riscv crossgcc-power8 crossgcc-clean iasl \
+ crossgcc-riscv crossgcc-power8 crossgcc-clean iasl \
clang crosstools-i386 crosstools-x64 crosstools-arm \
- crosstools-aarch64 crosstools-mips crosstools-riscv crosstools-power8 \
+ crosstools-aarch64 crosstools-riscv crosstools-power8 \
jenkins-build-toolchain gnumake nasm
$(foreach arch,$(TOOLCHAIN_ARCHES),crossgcc-$(arch)): clean-for-update
diff --git a/util/crossgcc/README b/util/crossgcc/README
index 5ce9304aa7..c40454f3d9 100644
--- a/util/crossgcc/README
+++ b/util/crossgcc/README
@@ -7,7 +7,6 @@ known working:
i386-elf
x86_64-elf
powerpc-elf
- mipsel-elf
arm-elf
armv7a-eabi
aarch64-elf
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index b75b90a877..0ce8f20851 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -604,7 +604,7 @@ myhelp()
printf " (defaults to $TARGETARCH)\n"
printf " [-S|--scripting] build scripting support for GDB\n\n"
printf "Platforms for GCC & GDB:\n"
- printf " x86_64 i386-elf i386-mingw32 mipsel-elf riscv-elf arm aarch64\n"
+ printf " x86_64 i386-elf i386-mingw32 riscv-elf arm aarch64\n"
printf " powerpc64le-linux-gnu nds32le-elf\n\n"
}
@@ -1018,7 +1018,6 @@ case "$TARGETARCH" in
x86_64*) TARGETARCH=x86_64-elf;;
i386-elf) ;;
i386-mingw32) ;;
- mipsel-elf) ;;
riscv-elf) TARGETARCH=riscv64-elf;;
powerpc64*-linux*) ;;
i386*) TARGETARCH=i386-elf;;
diff --git a/util/docker/coreboot.org-status/board-status.html/tohtml.sh b/util/docker/coreboot.org-status/board-status.html/tohtml.sh
index 41de9ff238..8522fd579b 100755
--- a/util/docker/coreboot.org-status/board-status.html/tohtml.sh
+++ b/util/docker/coreboot.org-status/board-status.html/tohtml.sh
@@ -334,9 +334,6 @@ EOF
TI_AM335X)
cpu_nice="TI AM335X";
socket_nice="?";;
- IMGTEC_PISTACHIO)
- cpu_nice="Imagination Technologies Pistachio";
- socket_nice="—";;
INTEL_APOLLOLAKE)
cpu_nice="Intel® Apollo Lake";
socket_nice="—";;
diff --git a/util/release/genrelnotes b/util/release/genrelnotes
index 2867cbffee..25c2993658 100755
--- a/util/release/genrelnotes
+++ b/util/release/genrelnotes
@@ -353,11 +353,6 @@ get_log_dedupe "ARM" \
get_log_dedupe "RISC-V" \
"$(for codedir in $(grep -rl "_RISCV" --include=Kconfig | grep -v 'payloads/\|drivers/\|vendorcode/\|console' ); do dirname "$codedir"; done | grep -v '^src$')" \
"riscv\|risc-v\|sifive"
-
-get_log_dedupe "MIPS" \
- "$(for codedir in $(grep -rl "_MIPS" --include=Kconfig | \
- grep -v 'src/mainboard\|payloads/\|drivers/\|vendorcode/\|console' ); \
- do dirname "$codedir"; done | grep -v '^src$')"
}
get_log_dedupe "X86 intel" \
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index 2d3da1e00e..f3400fef49 100755
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -195,14 +195,6 @@ detect_special_flags() {
"$LDFLAGS --fix-cortex-a53-843419" && \
LDFLAGS_ARM64_A53_ERRATUM_843419+=" --fix-cortex-a53-843419"
;;
- mipsel)
- testcc "$GCC" "$CFLAGS_GCC -mno-abicalls -fno-pic" && \
- CFLAGS_GCC+=" -mno-abicalls -fno-pic"
-
- # Enforce little endian mode.
- testcc "$GCC" "$CFLAGS_GCC -EL" && \
- CFLAGS_GCC+=" -EL"
- ;;
esac
}
@@ -314,7 +306,7 @@ EOF
}
# Architecture definitions
-SUPPORTED_ARCHITECTURES="arm arm64 mipsel riscv x64 x86 ppc64"
+SUPPORTED_ARCHITECTURES="arm arm64 riscv x64 x86 ppc64"
# TARCH: local name for the architecture
# (used as CC_${TARCH} in the build system)
@@ -367,16 +359,6 @@ arch_config_x86() {
CC_RT_EXTRA_GCC="--wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3"
}
-arch_config_mipsel() {
- TARCH="mips"
- TBFDARCHS="tradlittlemips littlemips"
- TCLIST="mipsel"
- TWIDTH="32"
- TSUPP="mips mipsel"
- TABI="elf"
- TENDIAN="EL"
-}
-
arch_config_ppc64() {
TARCH="ppc64"
TBFDARCHS="powerpc"