summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/Kconfig4
-rw-r--r--src/arch/armv7/boot/coreboot_table.c2
-rw-r--r--src/arch/x86/boot/coreboot_table.c15
-rw-r--r--src/cpu/amd/agesa/s3_resume.c2
-rw-r--r--src/lib/hardwaremain.c6
-rw-r--r--src/mainboard/emulation/qemu-x86/northbridge.c5
-rw-r--r--src/mainboard/google/snow/ramstage.c5
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c4
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c4
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c7
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c6
-rw-r--r--src/northbridge/amd/gx1/northbridge.c4
-rw-r--r--src/northbridge/amd/gx2/northbridge.c4
-rw-r--r--src/northbridge/amd/lx/northbridge.c4
-rw-r--r--src/northbridge/intel/e7501/northbridge.c5
-rw-r--r--src/northbridge/intel/e7505/northbridge.c5
-rw-r--r--src/northbridge/intel/e7520/northbridge.c11
-rw-r--r--src/northbridge/intel/e7525/northbridge.c10
-rw-r--r--src/northbridge/intel/gm45/northbridge.c2
-rw-r--r--src/northbridge/intel/i3100/northbridge.c6
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c7
-rw-r--r--src/northbridge/intel/i440lx/northbridge.c10
-rw-r--r--src/northbridge/intel/i5000/northbridge.c5
-rw-r--r--src/northbridge/intel/i82810/northbridge.c8
-rw-r--r--src/northbridge/intel/i82830/northbridge.c6
-rw-r--r--src/northbridge/intel/i855/northbridge.c6
-rw-r--r--src/northbridge/intel/i945/northbridge.c7
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c2
-rw-r--r--src/northbridge/intel/sch/northbridge.c7
-rw-r--r--src/northbridge/rdc/r8610/northbridge.c5
-rw-r--r--src/northbridge/via/cn400/northbridge.c7
-rw-r--r--src/northbridge/via/cn700/northbridge.c7
-rw-r--r--src/northbridge/via/cx700/northbridge.c5
-rw-r--r--src/northbridge/via/vt8601/northbridge.c7
-rw-r--r--src/northbridge/via/vt8623/northbridge.c7
38 files changed, 17 insertions, 202 deletions
diff --git a/src/Kconfig b/src/Kconfig
index 2dc251d400..4dbc23ed65 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -396,10 +396,6 @@ config MAX_PIRQ_LINKS
menu "System tables"
-config WRITE_HIGH_TABLES
- bool "Write 'high' tables to avoid being overwritten in F segment"
- default y
-
config MULTIBOOT
bool "Generate Multiboot tables (for GRUB2)"
default y
diff --git a/src/arch/armv7/boot/coreboot_table.c b/src/arch/armv7/boot/coreboot_table.c
index 55610acd7d..47aad3601b 100644
--- a/src/arch/armv7/boot/coreboot_table.c
+++ b/src/arch/armv7/boot/coreboot_table.c
@@ -625,12 +625,10 @@ unsigned long write_coreboot_table(
lb_add_memory_range(mem, LB_MEM_TABLE,
table_start, table_end - table_start);
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "Adding high table area\n");
// should this be LB_MEM_ACPI?
lb_add_memory_range(mem, LB_MEM_TABLE,
table_start, table_end - table_start);
-#endif
/* Add reserved regions */
add_lb_reserved(mem);
diff --git a/src/arch/x86/boot/coreboot_table.c b/src/arch/x86/boot/coreboot_table.c
index 04fba47b3f..e456e1ebfa 100644
--- a/src/arch/x86/boot/coreboot_table.c
+++ b/src/arch/x86/boot/coreboot_table.c
@@ -329,7 +329,6 @@ static void lb_strings(struct lb_header *header)
}
-#if CONFIG_WRITE_HIGH_TABLES
static struct lb_forward *lb_forward(struct lb_header *header, struct lb_header *next_header)
{
struct lb_record *rec;
@@ -341,7 +340,6 @@ static struct lb_forward *lb_forward(struct lb_header *header, struct lb_header
forward->forward = (uint64_t)(unsigned long)next_header;
return forward;
}
-#endif
static void lb_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size)
@@ -600,7 +598,6 @@ unsigned long write_coreboot_table(
struct lb_header *head;
struct lb_memory *mem;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "Writing high table forward entry at 0x%08lx\n",
low_table_end);
head = lb_table_init(low_table_end);
@@ -614,16 +611,6 @@ unsigned long write_coreboot_table(
head = lb_table_init(rom_table_end);
rom_table_end = (unsigned long)head;
printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);
-#else
- if(low_table_end > (0x1000 - sizeof(struct lb_header))) { /* after 4K */
- /* We need to put lbtable on to [0xf0000,0x100000) */
- head = lb_table_init(rom_table_end);
- rom_table_end = (unsigned long)head;
- } else {
- head = lb_table_init(low_table_end);
- low_table_end = (unsigned long)head;
- }
-#endif
printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
low_table_end += 0xfff; // 4K aligned
@@ -663,12 +650,10 @@ unsigned long write_coreboot_table(
lb_add_memory_range(mem, LB_MEM_TABLE,
rom_table_start, rom_table_end-rom_table_start);
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "Adding high table area\n");
// should this be LB_MEM_ACPI?
lb_add_memory_range(mem, LB_MEM_TABLE,
high_tables_base, high_tables_size);
-#endif
/* Add reserved regions */
add_lb_reserved(mem);
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index ee9d7c9f2d..ada4d3ca72 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -24,9 +24,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
#include <cpu/x86/cache.h>
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
#include <device/device.h>
#include <device/pci.h>
#ifndef __PRE_RAM__
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 85c05f5093..d2213d2c83 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -39,9 +39,7 @@ it with the version available from LANL.
#if CONFIG_HAVE_ACPI_RESUME
#include <arch/acpi.h>
#endif
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
#include <coverage.h>
#include <timestamp.h>
@@ -113,12 +111,10 @@ void hardwaremain(int boot_complete)
timestamp_stash(TS_DEVICE_DONE);
-#if CONFIG_WRITE_HIGH_TABLES
cbmem_initialize();
#if CONFIG_CONSOLE_CBMEM
cbmemc_reinit();
#endif
-#endif
timestamp_sync();
#if CONFIG_HAVE_ACPI_RESUME
@@ -128,10 +124,8 @@ void hardwaremain(int boot_complete)
timestamp_add_now(TS_CBMEM_POST);
-#if CONFIG_WRITE_HIGH_TABLES
if (cbmem_post_handling)
cbmem_post_handling();
-#endif
timestamp_add_now(TS_WRITE_TABLES);
diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c
index 3e7fbb99dd..d785bebbc4 100644
--- a/src/mainboard/emulation/qemu-x86/northbridge.c
+++ b/src/mainboard/emulation/qemu-x86/northbridge.c
@@ -9,10 +9,7 @@
#include <string.h>
#include <delay.h>
#include <smbios.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
#include "memory.c"
@@ -38,11 +35,9 @@ static void cpu_pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
assign_resources(dev->link_list);
}
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index a3e9236ac5..5970357512 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -18,10 +18,7 @@
*/
#include <console/console.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
void hardwaremain(int boot_complete);
void main(void)
@@ -29,13 +26,11 @@ void main(void)
console_init();
printk(BIOS_INFO, "hello from ramstage\n");
-#if CONFIG_WRITE_HIGH_TABLES
/* place at top of physical memory */
high_tables_size = CONFIG_COREBOOT_TABLES_SIZE;
high_tables_base = CONFIG_SYS_SDRAM_BASE +
((CONFIG_DRAM_SIZE_MB << 20UL) * CONFIG_NR_DRAM_BANKS) -
CONFIG_COREBOOT_TABLES_SIZE;
-#endif
hardwaremain(0);
}
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index cd21d9c341..e0c3255456 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -1036,7 +1036,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1048,7 +1047,6 @@ static void amdfam10_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -1063,7 +1061,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1075,7 +1072,6 @@ static void amdfam10_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 1467fdcfd2..2ef556324a 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -722,7 +722,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
ram_resource(dev, idx, basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -735,7 +734,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
(u32)(high_tables_size / 1024),
high_tables_base);
}
-#endif
}
basek = mmio_basek;
@@ -751,7 +749,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
ram_resource(dev, (idx | 0), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
0, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -764,7 +761,6 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek);
printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n",
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index c1685ec00c..3d46ad7756 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -716,7 +716,6 @@ static void domain_set_resources(device_t dev)
pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base == 0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -728,7 +727,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
@@ -743,7 +741,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | 0), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG,
"%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0,
mmio_basek, basek, limitk);
@@ -757,7 +754,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
printk(BIOS_DEBUG, " adsr - mmio_basek = %lx.\n", mmio_basek);
printk(BIOS_DEBUG, " adsr - high_tables_size = %llx.\n",
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 5cd76a33cc..36e1499fa3 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -807,7 +807,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -819,7 +818,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -834,7 +832,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -846,7 +843,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 144dde726f..90f8345a57 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -793,7 +793,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -805,7 +804,6 @@ static void domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
(u32)(high_tables_size / 1024), high_tables_base);
}
-#endif
}
basek = mmio_basek;
}
@@ -820,7 +818,6 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -832,7 +829,6 @@ static void domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index aabbae2e88..875f462ba4 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -842,9 +842,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#endif
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void setup_uma_memory(void)
{
@@ -1039,7 +1037,7 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
+
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1051,7 +1049,6 @@ static void amdfam10_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
-#endif
}
#if !CONFIG_AMDMCT
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
@@ -1077,7 +1074,6 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1089,7 +1085,6 @@ static void amdfam10_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 5ed7762047..5c1d97a1c6 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -817,9 +817,7 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
}
#endif
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void setup_uma_memory(void)
{
@@ -1044,7 +1042,6 @@ static void amdk8_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA
@@ -1056,7 +1053,6 @@ static void amdk8_domain_set_resources(device_t dev)
printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
HIGH_MEMORY_SIZE / 1024, high_tables_base);
}
-#endif
}
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
if(reset_memhole)
@@ -1079,7 +1075,6 @@ static void amdk8_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
@@ -1091,7 +1086,6 @@ static void amdk8_domain_set_resources(device_t dev)
#endif
high_tables_size = HIGH_MEMORY_SIZE;
}
-#endif
}
#if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index e4832636bf..4547b8d243 100644
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -64,9 +64,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_CYRIX_PCI_MASTER,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -111,11 +109,9 @@ static void pci_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
/* Report the memory regions */
idx = 10;
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 995237486b..62de416a88 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -271,9 +271,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_NS_GX2,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -292,11 +290,9 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tomk - 768); /* Systop - 0xc0000 -> KB */
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 3a2eb462ed..5909d1360e 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -370,9 +370,7 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = PCI_DEVICE_ID_AMD_LXBRIDGE,
};
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -391,11 +389,9 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tomk - 768); // Systop - 0xc0000 -> KB
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index ab382fa03f..d30c9dfe11 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -6,10 +6,7 @@
#include <cpu/cpu.h>
#include <stdlib.h>
#include <string.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -87,11 +84,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 1b6f40d84a..6ee371f4aa 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -7,10 +7,7 @@
#include <stdlib.h>
#include <string.h>
#include "e7505.h"
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -88,11 +85,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index 03aad3e29f..96fcc35abd 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -7,18 +7,14 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "northbridge.h"
#include "e7520.h"
-
static unsigned int max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -26,9 +22,8 @@ static void pci_domain_set_resources(device_t dev)
pci_tolm = find_pci_tolm(dev->link_list);
-#if 1
printk(BIOS_DEBUG, "PCI mem marker = %x\n", pci_tolm);
-#endif
+
/* FIXME Me temporary hack */
if(pci_tolm > 0xe0000000)
pci_tolm = 0xe0000000;
@@ -107,11 +102,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 12ee971e37..83757bd927 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -7,18 +7,14 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "northbridge.h"
#include "e7525.h"
-
static unsigned int max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -26,9 +22,7 @@ static void pci_domain_set_resources(device_t dev)
pci_tolm = find_pci_tolm(dev->link_list);
-#if 1
printk(BIOS_DEBUG, "PCI mem marker = %x\n", pci_tolm);
-#endif
/* FIXME Me temporary hack */
if(pci_tolm > 0xe0000000)
pci_tolm = 0xe0000000;
@@ -107,11 +101,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 9c1e96de6b..c7aa3fa0f4 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -166,11 +166,9 @@ static void mch_domain_read_resources(device_t dev)
pcie_config_size >> 10, IORESOURCE_RESERVE);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk << 10) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
static void mch_domain_set_resources(device_t dev)
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 87c5e75593..3e62ae4793 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -29,6 +29,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "i3100.h"
@@ -36,9 +37,6 @@
static u32 max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -128,11 +126,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 488275db14..2ab62a9e43 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -6,6 +6,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
#include "northbridge.h"
@@ -31,10 +32,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x7190,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void i440bx_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -70,11 +67,9 @@ static void i440bx_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index bbb621e1a9..623071f0f6 100644
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -27,6 +27,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
#include "northbridge.h"
@@ -37,9 +38,6 @@
* Maciej
*/
-/* TODO:
- * - maybe this could print Northbridge i440LX Init?
- */
static void northbridge_init(device_t dev)
{
printk(BIOS_SPEW, "Northbridge Init\n");
@@ -60,10 +58,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x7180,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void i440lx_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -99,11 +93,9 @@ static void i440lx_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index c9b99a980c..cd1abc8cd9 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -28,9 +28,6 @@
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
@@ -114,12 +111,10 @@ static void mc_read_resources(device_t dev)
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = tolm - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "high_tables_base: %08llx, size %lld\n", high_tables_base, high_tables_size);
-#endif
}
static struct pci_operations intel_pci_ops = {
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 07dc47b05f..259a9f5c82 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -27,6 +27,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "i82810.h"
@@ -68,10 +69,6 @@ static int translate_i82810_to_mb[] = {
/* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -124,11 +121,10 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 768, tomk - 768);
uma_resource(dev, idx++, uma_memory_base >> 10, uma_memory_size >> 10);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
+
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 8920fe70cd..8ee1880f7c 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -24,6 +24,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <stdlib.h>
#include <string.h>
@@ -49,9 +50,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x3575,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -92,11 +90,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
static struct device_operations pci_domain_ops = {
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index 2ff58fd738..e3a3844323 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -28,6 +28,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/x86/cache.h>
#include <cpu/cpu.h>
@@ -51,9 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x3580,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -107,11 +105,9 @@ static void pci_domain_set_resources(device_t dev)
/* ram_resource(dev, idx++, 1024, tolmk - 1024); */
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 63a03adc5d..bf3bbcb1c6 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -26,6 +26,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include "i945.h"
@@ -80,10 +81,6 @@ static void add_fixed_resources(struct device *dev, int index)
}
}
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
uint32_t pci_tolm;
@@ -173,11 +170,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/* TODO We could determine how many PCIe busses we need in
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 4b6808a0fb..bc63d1adae 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -259,11 +259,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/* TODO We could determine how many PCIe busses we need in
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index ffeb0ed942..3a71da20ca 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -26,6 +26,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include "sch.h"
@@ -92,10 +93,6 @@ static void add_fixed_resources(struct device *dev, int index)
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
}
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
u32 pci_tolm;
@@ -185,13 +182,11 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables. */
high_tables_base = tomk * 1024 - HIGH_MEMORY_SIZE;
high_tables_base -= uma_memory_size;
high_tables_base -= tseg_memory_base;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/*
diff --git a/src/northbridge/rdc/r8610/northbridge.c b/src/northbridge/rdc/r8610/northbridge.c
index 622b056c5d..7c28d47c78 100644
--- a/src/northbridge/rdc/r8610/northbridge.c
+++ b/src/northbridge/rdc/r8610/northbridge.c
@@ -29,10 +29,7 @@
#include <stdlib.h>
#include <string.h>
#include <smbios.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static unsigned long get_memory_size(void)
{
@@ -67,11 +64,9 @@ static void cpu_pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index 088175e529..bce145b32e 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -29,6 +29,7 @@
#include <stdlib.h>
#include <string.h>
#include <lib.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "cn400.h"
@@ -176,10 +177,6 @@ static void ram_reservation(device_t dev, unsigned long index,
}
#endif
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void cn400_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -206,13 +203,11 @@ static void cn400_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Locate the High Tables at the Top of Low Memory below the Video RAM */
high_tables_base = ((tolmk - (CONFIG_VIDEO_MB *1024)) * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_SPEW, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
-#endif
/* Report the memory regions. */
idx = 10;
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index 0bd06aa80e..2faa1497bf 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -29,6 +29,7 @@
#include <stdlib.h>
#include <string.h>
#include <lib.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "cn700.h"
@@ -96,10 +97,6 @@ static const struct pci_driver memctrl_driver __pci_driver = {
.device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
/* The order is important to find the correct RAM size. */
@@ -137,12 +134,10 @@ static void pci_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
high_tables_base = ((tolmk - CONFIG_VIDEO_MB * 1024) * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
-#endif
/* Report the memory regions. */
idx = 10;
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index 1f045c9bc5..69f534f1f5 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -28,10 +28,7 @@
#include <string.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -71,12 +68,10 @@ static void pci_domain_set_resources(device_t dev)
tolmk -= 1024; // TOP 1M SM Memory
}
-#if CONFIG_WRITE_HIGH_TABLES
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
-#endif
/* Report the memory regions */
idx = 10;
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 5cc7bc9c84..45a0ac5649 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -6,6 +6,7 @@
#include <device/pci_ids.h>
#include <device/hypertransport.h>
#include <cpu/cpu.h>
+#include <cbmem.h>
#include <stdlib.h>
#include <string.h>
#include "northbridge.h"
@@ -43,10 +44,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x0601, /* 0x8601 is the AGP bridge? */
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
static const uint8_t ramregs[] = {
@@ -87,12 +84,10 @@ static void pci_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
-#endif
/* Report the memory regions */
idx = 10;
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 827d3f7dfd..f93a886e6a 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -10,6 +10,7 @@
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
+#include <cbmem.h>
/*
* This fixup is based on capturing values from an Award BIOS. Without
@@ -102,10 +103,6 @@ static const struct pci_driver agp_driver __pci_driver = {
.device = PCI_DEVICE_ID_VIA_8633_1,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
@@ -146,12 +143,10 @@ static void pci_domain_set_resources(device_t dev)
tolmk = tomk;
}
-#if CONFIG_WRITE_HIGH_TABLES
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n",
tomk*1024, high_tables_base, high_tables_size);
-#endif
/* Report the memory regions */
idx = 10;