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-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb46
1 files changed, 46 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index eb9dc1cffb..cdd325cdd6 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -2,4 +2,50 @@ chip soc/intel/tigerlake
device cpu_cluster 0 on
device lapic 0 on end
end
+
+ device domain 0 on
+ device pci 00.0 off end # Host Bridge
+ device pci 02.0 off end # Integrated Graphics Device
+ device pci 04.0 off end # SA Thermal device
+ device pci 05.0 off end # IPU
+ device pci 09.0 off end # Intel Trace Hub
+ device pci 12.6 off end # GSPI 2
+ device pci 14.0 off end # USB xHCI
+ device pci 14.1 off end # USB xDCI (OTG)
+ device pci 14.2 off end # PMC SRAM
+ device pci 14.3 off end # CNVi wifi
+ device pci 14.5 off end # SDCard
+ device pci 15.0 off end # I2C 0
+ device pci 15.1 off end # I2C 1
+ device pci 15.2 off end # I2C 2
+ device pci 15.3 off end # I2C 3
+ device pci 16.0 off end # HECI 1
+ device pci 16.1 off end # HECI 2
+ device pci 16.4 off end # HECI 3
+ device pci 16.5 off end # HECI 4
+ device pci 17.0 off end # SATA
+ device pci 19.0 off end # I2C 4
+ device pci 19.1 off end # I2C 5
+ device pci 19.2 off end # UART 2
+ device pci 1a.0 off end # eMMC
+ device pci 1c.0 off end # PCI Express Root Port 1
+ device pci 1c.1 off end # PCI Express Root Port 2
+ device pci 1c.2 off end # PCI Express Root Port 3
+ device pci 1c.3 off end # PCI Express Root Port 4 - WLAN
+ device pci 1c.4 off end # PCI Express Root Port 5
+ device pci 1c.5 off end # PCI Express Root Port 6
+ device pci 1c.6 off end # PCI Express Root Port 7
+ device pci 1c.7 off end # PCI Express Root Port 8
+ device pci 1e.0 off end # UART 0
+ device pci 1e.1 off end # UART 1
+ device pci 1e.2 off end # GSPI 0
+ device pci 1e.3 off end # GSPI 1
+ device pci 1f.0 off end # eSPI Interface
+ device pci 1f.1 off end # P2SB
+ device pci 1f.2 off end # Power Management Controller
+ device pci 1f.3 off end # Intel HDA/cAVS
+ device pci 1f.4 off end # SMBus
+ device pci 1f.5 off end # PCH SPI
+ device pci 1f.7 off end # Intel Trace Hub
+ end
end