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-rw-r--r--src/soc/intel/common/block/fast_spi/fast_spi.c5
-rw-r--r--src/soc/intel/common/block/lpc/lpc_lib.c3
2 files changed, 5 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 455b13ccb7..58e7db75a1 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -236,14 +236,13 @@ void fast_spi_cache_bios_region(void)
/* Only the IFD BIOS region is memory mapped (at top of 4G) */
fast_spi_get_bios_region(&bios_size);
- if (!bios_size)
- return;
-
/* LOCAL APIC default address is 0xFEE0000, bios_size over 16MB will
* cause memory type conflict when setting memory type to write
* protection, so limit the cached bios region to be no more than 16MB.
* */
bios_size = MIN(bios_size, 16 * MiB);
+ if (!bios_size)
+ return;
/* Round to power of two */
alignment = 1UL << (log2_ceil(bios_size));
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index b383637736..c67c43532c 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -80,6 +80,9 @@ void lpc_open_pmio_window(uint16_t base, uint16_t size)
/* Each IO range register can only open a 256-byte window. */
window_size = MIN(size, LPC_LGIR_MAX_WINDOW_SIZE);
+ if (!window_size)
+ return;
+
/* Window size must be a power of two for the AMASK to work. */
alignment = 1UL << (log2_ceil(window_size));
window_size = ALIGN_UP(window_size, alignment);