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-rw-r--r--src/cpu/Kconfig1
-rw-r--r--src/cpu/Makefile.inc1
-rw-r--r--src/cpu/ti/Kconfig11
-rw-r--r--src/cpu/ti/Makefile.inc1
-rw-r--r--src/cpu/ti/am335x/Kconfig79
-rw-r--r--src/cpu/ti/am335x/Makefile.inc12
-rw-r--r--src/cpu/ti/am335x/bootblock.c33
-rw-r--r--src/cpu/ti/am335x/dmtimer.c29
-rw-r--r--src/cpu/ti/am335x/dmtimer.h30
-rw-r--r--src/cpu/ti/am335x/monotonic_timer.c57
-rw-r--r--src/cpu/ti/am335x/nand.c26
-rw-r--r--src/cpu/ti/am335x/timer.c51
-rw-r--r--src/cpu/ti/am335x/uart.c137
-rw-r--r--src/cpu/ti/am335x/uart.h36
-rw-r--r--src/mainboard/Kconfig3
-rw-r--r--src/mainboard/ti/Kconfig37
-rw-r--r--src/mainboard/ti/beaglebone/Kconfig153
-rw-r--r--src/mainboard/ti/beaglebone/Makefile.inc22
-rw-r--r--src/mainboard/ti/beaglebone/bootblock.c31
-rw-r--r--src/mainboard/ti/beaglebone/devicetree.cb22
-rw-r--r--src/mainboard/ti/beaglebone/mainboard.c23
-rw-r--r--src/mainboard/ti/beaglebone/romstage.c37
22 files changed, 832 insertions, 0 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index ed7d6ab3ac..dd28cb7ff8 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -5,6 +5,7 @@ if ARCH_ARMV7
source src/cpu/armltd/Kconfig
source src/cpu/samsung/Kconfig
+source src/cpu/ti/Kconfig
endif # ARCH_ARM
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 8d93756390..25ef424f35 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -5,6 +5,7 @@ subdirs-y += amd
subdirs-y += armltd
subdirs-y += intel
subdirs-y += samsung
+subdirs-y += ti
subdirs-y += via
subdirs-y += x86
diff --git a/src/cpu/ti/Kconfig b/src/cpu/ti/Kconfig
new file mode 100644
index 0000000000..c82c290728
--- /dev/null
+++ b/src/cpu/ti/Kconfig
@@ -0,0 +1,11 @@
+config CPU_TI_AM335X
+ depends on ARCH_ARMV7
+ select HAVE_MONOTONIC_TIMER
+ select HAVE_UART_SPECIAL
+ select DEFAULT_EARLY_CONSOLE
+ bool
+ default n
+
+if CPU_TI_AM335X
+source src/cpu/ti/am335x/Kconfig
+endif
diff --git a/src/cpu/ti/Makefile.inc b/src/cpu/ti/Makefile.inc
new file mode 100644
index 0000000000..64b22f62f2
--- /dev/null
+++ b/src/cpu/ti/Makefile.inc
@@ -0,0 +1 @@
+subdirs-$(CONFIG_CPU_TI_AM335X) += am335x
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
new file mode 100644
index 0000000000..c4ef8f1703
--- /dev/null
+++ b/src/cpu/ti/am335x/Kconfig
@@ -0,0 +1,79 @@
+config BOOTBLOCK_CPU_INIT
+ string
+ default "cpu/ti/am335x/bootblock.c"
+ help
+ CPU/SoC-specific bootblock code. This is useful if the
+ bootblock must load microcode or copy data from ROM before
+ searching for the bootblock.
+
+# Example SRAM/iRAM map for Exynos5250 platform:
+#
+# 0x0202_3400: bootblock, assume up to 32KB in size
+# 0x0203_0000: romstage, assume up to 128KB in size.
+# 0x0207_8000: stack pointer
+
+# FIXME: find out where romboot places ml0/coreboot
+config BOOTBLOCK_BASE
+ hex
+ default 0xdeadbeef
+
+#config ROMSTAGE_BASE
+# hex
+# default 0x02030000
+#
+# FIXME: this is bullshit.
+config ROMSTAGE_SIZE
+ hex
+ default 0xa000
+
+# Stack may reside in either IRAM or DRAM. We will define it to live
+# at the top of IRAM for now.
+#
+# Stack grows downward, push operation stores register contents in
+# consecutive memory locations ending just below SP
+config STACK_TOP
+ hex
+ default 0x02078000
+
+config STACK_BOTTOM
+ hex
+ default 0x02077000
+
+config STACK_SIZE
+ hex
+ default 0x1000
+
+config CBFS_ROM_OFFSET
+ # Calculated by BL1 + max bootblock size.
+ hex "offset of CBFS data in ROM"
+ default 0x0A000
+
+## TODO Change this to some better address not overlapping bootblock when
+## cbfstool supports creating header in arbitrary location.
+config CBFS_HEADER_ROM_OFFSET
+ hex "offset of master CBFS header in ROM"
+ default 0x40
+
+## TODO We may probably move this to board-specific implementation files instead
+## of KConfig values.
+#config CBFS_CACHE_ADDRESS
+# hex "memory address to put CBFS cache data"
+# default 0x02060000
+#
+#config CBFS_CACHE_SIZE
+# hex "size of CBFS cache data"
+# default 0x000017000
+
+# FIXME: other magic numbers that should probably go away
+config XIP_ROM_SIZE
+ hex
+ default ROMSTAGE_SIZE
+
+config SYS_SDRAM_BASE
+ hex
+ default 0x40000000
+
+# FIXME: this can probably be smaller
+config COREBOOT_TABLES_SIZE
+ hex
+ default 0x800
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
new file mode 100644
index 0000000000..8c4c663113
--- /dev/null
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -0,0 +1,12 @@
+bootblock-y += dmtimer.c
+bootblock-y += nand.c
+bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
+
+romstage-y += nand.c
+romstage-y += uart.c
+
+ramstage-y += dmtimer.c
+ramstage-y += monotonic_timer.c
+ramstage-y += nand.c
+ramstage-y += timer.c
+ramstage-y += uart.c
diff --git a/src/cpu/ti/am335x/bootblock.c b/src/cpu/ti/am335x/bootblock.c
new file mode 100644
index 0000000000..e9434a1fae
--- /dev/null
+++ b/src/cpu/ti/am335x/bootblock.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <types.h>
+
+#include <arch/cache.h>
+
+void bootblock_cpu_init(void);
+void bootblock_cpu_init(void)
+{
+ uint32_t sctlr;
+
+ /* enable dcache */
+ sctlr = read_sctlr();
+ sctlr |= SCTLR_C;
+ write_sctlr(sctlr);
+}
diff --git a/src/cpu/ti/am335x/dmtimer.c b/src/cpu/ti/am335x/dmtimer.c
new file mode 100644
index 0000000000..6a55d9d105
--- /dev/null
+++ b/src/cpu/ti/am335x/dmtimer.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "dmtimer.h"
+
+void dmtimer_start(int num)
+{
+}
+
+uint64_t dmtimer_raw_value(int num)
+{
+ return 0;
+}
diff --git a/src/cpu/ti/am335x/dmtimer.h b/src/cpu/ti/am335x/dmtimer.h
new file mode 100644
index 0000000000..12ca43801e
--- /dev/null
+++ b/src/cpu/ti/am335x/dmtimer.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __CPU_TI_AM335X_DMTIMER_H__
+#define __CPU_TI_AM335X_DMTIMER_H__
+
+#include <stdint.h>
+
+#define OSC_HZ 24000000
+
+void dmtimer_start(int num);
+uint64_t dmtimer_raw_value(int num);
+
+#endif
diff --git a/src/cpu/ti/am335x/monotonic_timer.c b/src/cpu/ti/am335x/monotonic_timer.c
new file mode 100644
index 0000000000..9a9083cd70
--- /dev/null
+++ b/src/cpu/ti/am335x/monotonic_timer.c
@@ -0,0 +1,57 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <delay.h>
+#include <timer.h>
+
+#include "dmtimer.h"
+
+static struct monotonic_counter {
+ int initialized;
+ struct mono_time time;
+ uint64_t last_value;
+} mono_counter;
+
+static const uint32_t clocks_per_usec = OSC_HZ/1000000;
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+ uint64_t current_tick;
+ uint64_t usecs_elapsed;
+
+ if (!mono_counter.initialized) {
+ init_timer();
+ mono_counter.last_value = dmtimer_raw_value(0);
+ mono_counter.initialized = 1;
+ }
+
+ current_tick = dmtimer_raw_value(0);
+ usecs_elapsed = (current_tick - mono_counter.last_value) /
+ clocks_per_usec;
+
+ /* Update current time and tick values only if a full tick occurred. */
+ if (usecs_elapsed) {
+ mono_time_add_usecs(&mono_counter.time, usecs_elapsed);
+ mono_counter.last_value = current_tick;
+ }
+
+ /* Save result. */
+ *mt = mono_counter.time;
+}
diff --git a/src/cpu/ti/am335x/nand.c b/src/cpu/ti/am335x/nand.c
new file mode 100644
index 0000000000..ddab389eda
--- /dev/null
+++ b/src/cpu/ti/am335x/nand.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <cbfs.h>
+
+int init_default_cbfs_media(struct cbfs_media *media)
+{
+ /* FIXME: add support for reading coreboot from NAND */
+ return 0;
+}
diff --git a/src/cpu/ti/am335x/timer.c b/src/cpu/ti/am335x/timer.c
new file mode 100644
index 0000000000..07b162a0ee
--- /dev/null
+++ b/src/cpu/ti/am335x/timer.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2013 Google Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <console/console.h>
+#include <delay.h>
+#include <timer.h>
+
+void init_timer(void)
+{
+}
+
+/* delay x useconds */
+void udelay(unsigned usec)
+{
+ struct mono_time current, end;
+
+ timer_monotonic_get(&current);
+ end = current;
+ mono_time_add_usecs(&end, usec);
+
+ if (mono_time_after(&current, &end)) {
+ printk(BIOS_EMERG, "udelay: 0x%08x is impossibly large\n",
+ usec);
+ /* There's not much we can do if usec is too big. Use a long,
+ * paranoid delay value and hope for the best... */
+ end = current;
+ mono_time_add_usecs(&end, USECS_PER_SEC);
+ }
+
+ while (mono_time_before(&current, &end))
+ timer_monotonic_get(&current);
+}
diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c
new file mode 100644
index 0000000000..fdf5c05908
--- /dev/null
+++ b/src/cpu/ti/am335x/uart.c
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2009 SAMSUNG Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
+ * Heungjun Kim <riverful.kim@samsung.com>
+ *
+ * based on drivers/serial/s3c64xx.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <types.h>
+#include <uart.h>
+#include <arch/io.h>
+
+#include <console/console.h> /* for __console definition */
+
+#include <cpu/ti/am335x/uart.h>
+
+#define RX_FIFO_COUNT_MASK 0xff
+#define RX_FIFO_FULL_MASK (1 << 8)
+#define TX_FIFO_FULL_MASK (1 << 24)
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+static void am335x_uart_init_dev(void)
+{
+ /* FIXME: implement this
+ * ref: section 19.4.1.1.1 for reset
+ * ref: section 19.4.1.1.2 for FIFO, skip DMA
+ * ref: section 19.4.1.1.3 for baud rate, skip
+ * interrupts and protocol stuff.
+ * */
+#if 0
+ struct s5p_uart *uart = (struct s5p_uart *)base_port;
+
+ // TODO initialize with correct peripheral id by base_port.
+ exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+
+ /* enable FIFOs */
+ writel(0x1, &uart->ufcon);
+ writel(0, &uart->umcon);
+ /* 8N1 */
+ writel(0x3, &uart->ulcon);
+ /* No interrupts, no DMA, pure polling */
+ writel(0x245, &uart->ucon);
+
+ serial_setbrg_dev();
+#endif
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+static unsigned char am335x_uart_rx_byte(void)
+{
+ /* FIXME: stub */
+#if 0
+ struct s5p_uart *uart = (struct s5p_uart *)base_port;
+
+ /* wait for character to arrive */
+ while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK |
+ RX_FIFO_FULL_MASK))) {
+ if (exynos5_uart_err_check(0))
+ return 0;
+ }
+
+ return readb(&uart->urxh) & 0xff;
+#endif
+ return 0xaa;
+}
+
+/*
+ * Output a single byte to the serial port.
+ */
+static void am335x_uart_tx_byte(unsigned char data)
+{
+ /* FIXME: stub */
+#if 0
+ struct s5p_uart *uart = (struct s5p_uart *)base_port;
+
+ /* wait for room in the tx FIFO */
+ while ((readl(&uart->ufstat) & TX_FIFO_FULL_MASK)) {
+ if (exynos5_uart_err_check(1))
+ return;
+ }
+
+ writeb(data, &uart->utxh);
+#endif
+}
+
+uint32_t uartmem_getbaseaddr(void)
+{
+ return CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
+}
+
+#if !defined(__PRE_RAM__)
+static const struct console_driver exynos5_uart_console __console = {
+ .init = am335x_uart_init_dev,
+ .tx_byte = am335x_uart_tx_byte,
+ .rx_byte = am335x_uart_rx_byte,
+};
+#else
+void uart_init(void)
+{
+ am335x_uart_init_dev();
+}
+
+unsigned char uart_rx_byte(void)
+{
+ return am335x_uart_rx_byte();
+}
+
+void uart_tx_byte(unsigned char data)
+{
+ am335x_uart_tx_byte(data);
+}
+
+void uart_tx_flush(void) {
+}
+#endif
diff --git a/src/cpu/ti/am335x/uart.h b/src/cpu/ti/am335x/uart.h
new file mode 100644
index 0000000000..b642e9c41a
--- /dev/null
+++ b/src/cpu/ti/am335x/uart.h
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2012 The ChromiumOS Authors
+ * (C) Copyright 2009 Samsung Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
+ * Heungjun Kim <riverful.kim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * This file is based off of arch/arm/include/asm/arch-exynos5/uart.h
+ * from u-boot.
+ */
+
+#ifndef __AM335X_UART_H_
+#define __AM335X_UART_H
+
+#define AM335X_UART0_BASE 0x44e09000
+#define AM335X_UART1_BASE 0x48020000
+#define AM335X_UART2_BASE 0x48024000
+#define AM335X_UART3_BASE 0x481A6000
+#define AM335X_UART4_BASE 0x481A8000
+#define AM335X_UART5_BASE 0x481AA000
+
+#endif
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 3ca21ffdd5..1e5d4bd02d 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -120,6 +120,8 @@ config VENDOR_TECHNOLOGIC
bool "Technologic"
config VENDOR_TELEVIDEO
bool "TeleVideo"
+config VENDOR_TI
+ bool "TI"
config VENDOR_THOMSON
bool "Thomson"
config VENDOR_TRAVERSE
@@ -194,6 +196,7 @@ source "src/mainboard/technexion/Kconfig"
source "src/mainboard/technologic/Kconfig"
source "src/mainboard/televideo/Kconfig"
source "src/mainboard/thomson/Kconfig"
+source "src/mainboard/ti/Kconfig"
source "src/mainboard/traverse/Kconfig"
source "src/mainboard/tyan/Kconfig"
source "src/mainboard/via/Kconfig"
diff --git a/src/mainboard/ti/Kconfig b/src/mainboard/ti/Kconfig
new file mode 100644
index 0000000000..c4cd8c3ab0
--- /dev/null
+++ b/src/mainboard/ti/Kconfig
@@ -0,0 +1,37 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2013 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if VENDOR_TI
+
+# Auto select common options
+choice
+ prompt "Mainboard model"
+
+config BOARD_TI_BEAGLEBONE
+ bool "Beaglebone"
+
+endchoice
+
+source "src/mainboard/ti/beaglebone/Kconfig"
+
+config MAINBOARD_VENDOR
+ string
+ default "TI"
+
+endif # VENDOR_TI
diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig
new file mode 100644
index 0000000000..97fdf482f1
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/Kconfig
@@ -0,0 +1,153 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2013 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_TI_BEAGLEBONE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select ARCH_ARMV7
+ select CPU_TI_AM335X
+ select HAVE_UART_MEMORY_MAPPED
+ # FIXME: This should be much smaller
+ select BOARD_ROMSIZE_KB_128
+
+config MAINBOARD_DIR
+ string
+ default ti/beaglebone
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Beaglebone"
+
+config MAX_CPUS
+ int
+ default 1
+
+config MAINBOARD_VENDOR
+ string
+ default "TI"
+
+config BOOTBLOCK_MAINBOARD_INIT
+ string
+ default "mainboard/ti/beaglebone/bootblock.c"
+
+config DRAM_SIZE_MB
+ int
+ default 256
+
+config NR_DRAM_BANKS
+ int
+ default 1
+
+choice CONSOLE_SERIAL_UART_CHOICES
+ prompt "Serial Console UART"
+ default CONSOLE_SERIAL_UART0
+ depends on CONSOLE_SERIAL_UART
+
+config CONSOLE_SERIAL_UART0
+ bool "UART0"
+ help
+ Serial console on UART0
+
+config CONSOLE_SERIAL_UART1
+ bool "UART1"
+ help
+ Serial console on UART1
+
+config CONSOLE_SERIAL_UART2
+ bool "UART2"
+ help
+ Serial console on UART2
+
+config CONSOLE_SERIAL_UART3
+ bool "UART3"
+ help
+ Serial console on UART3
+
+config CONSOLE_SERIAL_UART4
+ bool "UART4"
+ help
+ Serial console on UART4
+
+config CONSOLE_SERIAL_UART5
+ bool "UART5"
+ help
+ Serial console on UART5
+
+endchoice
+
+config CONSOLE_SERIAL_UART_ADDRESS
+ hex
+ depends on CONSOLE_SERIAL_UART
+ default 0x44e09000 if CONSOLE_SERIAL_UART0
+ default 0x48022000 if CONSOLE_SERIAL_UART1
+ default 0x48024000 if CONSOLE_SERIAL_UART2
+ default 0x481a6000 if CONSOLE_SERIAL_UART3
+ default 0x481a8000 if CONSOLE_SERIAL_UART4
+ default 0x481aa000 if CONSOLE_SERIAL_UART5
+ help
+ Map the UART names to the respective MMIO address.
+
+#################################################################
+# stuff from smdk5250.h #
+# FIXME: can we move some of these to exynos5250's Kconfig? #
+#################################################################
+config SYS_I2C_SPEED
+ int
+ default 100000
+
+config I2C_MULTI_BUS
+ bool
+ default y
+
+#FIXME: get proper voltages
+
+config VDD_ARM_MV
+ int
+ default 1300 #1.3V
+
+config VDD_INT_UV
+ int
+ default 1012500 # 1.0125v
+
+config VDD_MIF_MV
+ int
+ default 1000 # 1.0v
+
+config VDD_G3D_MV
+ int
+ default 1200 # 1.2v
+
+config VDD_LDO2_MV
+ int
+ default 1500 # 1.5v
+
+config VDD_LDO3_MV
+ int
+ default 1800 # 1.8v
+
+config VDD_LDO5_MV
+ int
+ default 1800 # 1.8v
+
+config VDD_LDO10_MV
+ int
+ default 1800 # 1.8v
+
+endif # BOARD_TI_BEAGLEBONE
diff --git a/src/mainboard/ti/beaglebone/Makefile.inc b/src/mainboard/ti/beaglebone/Makefile.inc
new file mode 100644
index 0000000000..c76cb3772a
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+romstage-y += romstage.c
+
+#ramstage-y += ramstage.c
diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c
new file mode 100644
index 0000000000..77e382d1db
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/bootblock.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 The ChromiumOS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <types.h>
+#include <uart.h>
+#include <console/console.h>
+
+void bootblock_mainboard_init(void);
+void bootblock_mainboard_init(void)
+{
+ /* Start monotonic timer */
+ //rtc_start();
+
+ console_init();
+}
diff --git a/src/mainboard/ti/beaglebone/devicetree.cb b/src/mainboard/ti/beaglebone/devicetree.cb
new file mode 100644
index 0000000000..f7b409c3b0
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/devicetree.cb
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2013 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+chip cpu/ti/am335x
+ device cpu_cluster 0 on end
+end
diff --git a/src/mainboard/ti/beaglebone/mainboard.c b/src/mainboard/ti/beaglebone/mainboard.c
new file mode 100644
index 0000000000..1717be4369
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/mainboard.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* FIXME: this is a stub */
+void main(void)
+{
+}
diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c
new file mode 100644
index 0000000000..74eaaf2995
--- /dev/null
+++ b/src/mainboard/ti/beaglebone/romstage.c
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <types.h>
+
+#include <armv7.h>
+#include <cbfs.h>
+#include <common.h>
+
+#include <arch/stages.h>
+#include <console/console.h>
+
+void main(void)
+{
+ void *entry;
+
+ entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
+ printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry);
+
+ stage_exit(entry);
+}