diff options
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/Kconfig | 10 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/devicetree.cb | 79 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/mptable.c | 12 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/romstage.c | 4 |
4 files changed, 32 insertions, 73 deletions
diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index 510ce617e3..13eff4dd80 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -4,6 +4,7 @@ config BOARD_SUPERMICRO_H8QME_FAM10 select CPU_AMD_SOCKET_F_1207 select NORTHBRIDGE_AMD_AMDFAM10 select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX + select SOUTHBRIDGE_AMD_AMD8132 select SOUTHBRIDGE_NVIDIA_MCP55 select SUPERIO_WINBOND_W83627HF select HAVE_PIRQ_TABLE @@ -49,7 +50,7 @@ config RAMTOP config HEAP_SIZE hex - default 0xc0000 + default 0xff000 depends on BOARD_SUPERMICRO_H8QME_FAM10 config APIC_ID_OFFSET @@ -134,10 +135,15 @@ config AMD_UCODE_PATCH_FILE config SERIAL_CPU_INIT bool - default n + default y depends on BOARD_SUPERMICRO_H8QME_FAM10 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID hex default 0x1511 depends on BOARD_SUPERMICRO_H8QME_FAM10 + +config STACK_SIZE + hex + default 0x10000 + depends on BOARD_SUPERMICRO_H8QME_FAM10 diff --git a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb index 8d8936c92f..51c2feb000 100644 --- a/src/mainboard/supermicro/h8qme_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8qme_fam10/devicetree.cb @@ -27,7 +27,7 @@ chip northbridge/amd/amdfam10/root_complex io 0x60 = 0x3f8 irq 0x70 = 4 end - device pnp 2e.3 on # Com2 + device pnp 2e.3 off # Com2 io 0x60 = 0x2f8 irq 0x70 = 3 end @@ -54,52 +54,10 @@ chip northbridge/amd/amdfam10/root_complex end end end - device pci 1.1 on # SM 0 - chip drivers/generic/generic #dimm 0-0-0 - device i2c 50 on end - end - chip drivers/generic/generic #dimm 0-0-1 - device i2c 51 on end - end - chip drivers/generic/generic #dimm 0-1-0 - device i2c 52 on end - end - chip drivers/generic/generic #dimm 0-1-1 - device i2c 53 on end - end - chip drivers/generic/generic #dimm 1-0-0 - device i2c 54 on end - end - chip drivers/generic/generic #dimm 1-0-1 - device i2c 55 on end - end - chip drivers/generic/generic #dimm 1-1-0 - device i2c 56 on end - end - chip drivers/generic/generic #dimm 1-1-1 - device i2c 57 on end - end - end # SM + device pci 1.1 on end device pci 1.1 on # SM 1 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? -# chip drivers/generic/generic #PCIXA Slot1 -# device i2c 50 on end -# end -# chip drivers/generic/generic #PCIXB Slot1 -# device i2c 51 on end -# end -# chip drivers/generic/generic #PCIXB Slot2 -# device i2c 52 on end -# end -# chip drivers/generic/generic #PCI Slot1 -# device i2c 53 on end -# end -# chip drivers/generic/generic #Master MCP55 PCI-E -# device i2c 54 on end -# end -# chip drivers/generic/generic #Slave MCP55 PCI-E -# device i2c 55 on end -# end +# chip drivers/generic/generic #MAC EEPROM device i2c 51 on end end @@ -111,20 +69,13 @@ chip northbridge/amd/amdfam10/root_complex device pci 5.0 on end # SATA 0 device pci 5.1 on end # SATA 1 device pci 5.2 on end # SATA 2 - device pci 6.0 on # PCI - device pci 6.0 on end - end - device pci 6.1 on end # AZA - device pci 8.0 on end # NIC - device pci 9.0 on end # NIC - device pci a.0 on # PCI E 5 - device pci 0.0 on #nec pci-x - end - device pci 0.1 on #nec pci-x - device pci 4.0 on end #scsi - device pci 4.1 on end #scsi - end + device pci 6.1 off end # AZA + device pci 7.0 on + device pci 1.0 on end end + device pci 8.0 off end + device pci 9.0 off end + device pci a.0 on end # PCI E 5 device pci b.0 on end # PCI E 4 device pci c.0 on end # PCI E 3 device pci d.0 on end # PCI E 2 @@ -142,6 +93,18 @@ chip northbridge/amd/amdfam10/root_complex device pci 18.3 on end device pci 18.4 on end device pci 19.0 on end + device pci 19.0 on end + device pci 19.0 on + chip southbridge/amd/amd8132 + device pci 0.0 on end + device pci 0.1 on end + device pci 1.0 on + device pci 3.0 on end + device pci 3.1 on end + end + device pci 1.1 on end + end #amd8132 + end #device pci 19.0 device pci 19.1 on end device pci 19.2 on end device pci 19.3 on end diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c index 8cbf92cc6d..edf7b7364f 100644 --- a/src/mainboard/supermicro/h8qme_fam10/mptable.c +++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c @@ -94,20 +94,10 @@ void *smp_write_config_table(void *v) pci_write_config32(dev, 0x80, dword); dword = 0xa000000b; - dword = 0x10000002; pci_write_config32(dev, 0x84, dword); } - /* 8132_1 */ - dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(sbdn3,1)); - res = find_resource(dev,PCI_BASE_ADDRESS_0); - smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base); - - /* 8132_2 */ - dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(sbdn3+1,1)); - res = find_resource(dev,PCI_BASE_ADDRESS_0); - smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base); } @@ -125,7 +115,7 @@ void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0xe, m->apicid_mcp55, 0xe); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0xf, m->apicid_mcp55, 0xf); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5); /* 5 SMBus! Not correctly assign!!*/ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5); /* 5 SMBus, OK */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|0, m->apicid_mcp55, 0xb); /* 11 USB, OK */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|1, m->apicid_mcp55, 0xa); /* 10 USB, OK */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|0, m->apicid_mcp55, 0x5); /* 5 IDE, OK*/ diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 4ebc47f6a0..749527fce9 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -118,8 +118,8 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" #define MCP55_NUM 1 -#define MCP55_USE_NIC 1 -#define MCP55_USE_AZA 1 +#define MCP55_USE_NIC 0 +#define MCP55_USE_AZA 0 #define MCP55_PCI_E_X_0 4 |