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-rw-r--r--src/lib/ramtest.c24
-rw-r--r--src/northbridge/intel/e7501/debug.c32
2 files changed, 28 insertions, 28 deletions
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 3f4657fa8f..b35c36d562 100644
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -53,7 +53,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
/*
* Fill.
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM fill: ");
@@ -65,7 +65,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
for(addr = start; addr < stop ; addr += 4) {
/* Display address being filled */
if (!(addr & 0xfffff)) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
@@ -75,7 +75,7 @@ static void ram_fill(unsigned long start, unsigned long stop)
write_phys(addr, (u32)addr);
};
/* Display final address */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr);
#else
print_debug_hex32(addr);
@@ -90,7 +90,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
/*
* Verify.
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop);
#else
print_debug("DRAM verify: ");
@@ -103,7 +103,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
unsigned long value;
/* Display address being tested */
if (!(addr & 0xfffff)) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx \r", addr);
#else
print_debug_hex32(addr);
@@ -113,7 +113,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
value = read_phys(addr);
if (value != addr) {
/* Display address with error */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value);
#else
print_err("Fail: @0x");
@@ -124,7 +124,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
#endif
i++;
if(i>256) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Aborting.\n");
#else
print_debug("Aborting.\n");
@@ -134,14 +134,14 @@ static void ram_verify(unsigned long start, unsigned long stop)
}
}
/* Display final address */
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%08lx", addr);
#else
print_debug_hex32(addr);
#endif
if (i) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
#else
print_debug("\nDRAM did _NOT_ verify!\n");
@@ -149,7 +149,7 @@ static void ram_verify(unsigned long start, unsigned long stop)
die("DRAM ERROR");
}
else {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\nDRAM range verified.\n");
#else
print_debug("\nDRAM range verified.\n");
@@ -165,7 +165,7 @@ void ram_check(unsigned long start, unsigned long stop)
* test than a "Is my DRAM faulty?" test. Not all bits
* are tested. -Tyson
*/
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop);
#else
print_debug("Testing DRAM : ");
@@ -178,7 +178,7 @@ void ram_check(unsigned long start, unsigned long stop)
/* Make sure we don't read before we wrote */
phys_memory_barrier();
ram_verify(start, stop);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "Done.\n");
#else
print_debug("Done.\n");
diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index f19de0c1e7..07f15968e5 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -39,7 +39,7 @@ static void dump_pci_device(unsigned dev)
for(i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x:",i);
#else
print_debug("\n");
@@ -48,7 +48,7 @@ static void dump_pci_device(unsigned dev)
#endif
}
val = pci_read_config8(dev, i);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x", val);
#else
print_debug_char(' ');
@@ -101,7 +101,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel0[i];
if (device) {
int j;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
#else
print_debug("dimm: ");
@@ -113,7 +113,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
@@ -126,7 +126,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
break;
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -138,7 +138,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel1[i];
if (device) {
int j;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
#else
print_debug("dimm: ");
@@ -150,7 +150,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ", j);
#else
print_debug("\n");
@@ -163,7 +163,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
break;
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -181,7 +181,7 @@ static inline void dump_smbus_registers(void)
for(device = 1; device < 0x80; device++) {
int j;
if( smbus_read_byte(device, 0) < 0 ) continue;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "smbus: %02x", device);
#else
print_debug("smbus: ");
@@ -195,7 +195,7 @@ static inline void dump_smbus_registers(void)
break;
}
if ((j & 0xf) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%02x: ",j);
#else
print_debug("\n");
@@ -204,7 +204,7 @@ static inline void dump_smbus_registers(void)
#endif
}
byte = status & 0xff;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x ", byte);
#else
print_debug_hex8(byte);
@@ -219,7 +219,7 @@ static inline void dump_io_resources(unsigned port)
{
int i;
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%04x:\n", port);
#else
print_debug_hex16(port);
@@ -228,7 +228,7 @@ static inline void dump_io_resources(unsigned port)
for(i=0;i<256;i++) {
uint8_t val;
if ((i & 0x0f) == 0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "%02x:", i);
#else
print_debug_hex8(i);
@@ -236,7 +236,7 @@ static inline void dump_io_resources(unsigned port)
#endif
}
val = inb(port);
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x",val);
#else
print_debug_char(' ');
@@ -255,7 +255,7 @@ static inline void dump_mem(unsigned start, unsigned end)
print_debug("dump_mem:");
for(i=start;i<end;i++) {
if((i & 0xf)==0) {
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, "\n%08x:", i);
#else
print_debug("\n");
@@ -263,7 +263,7 @@ static inline void dump_mem(unsigned start, unsigned end)
print_debug(":");
#endif
}
-#if CONFIG_CACHE_AS_RAM
+#if !defined(__ROMCC__)
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
#else
print_debug(" ");