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-rw-r--r--src/soc/intel/skylake/include/soc/smm.h6
-rw-r--r--src/soc/intel/skylake/smi.c32
2 files changed, 0 insertions, 38 deletions
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index 71083b3cbf..6ba6fdb72c 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -61,10 +61,6 @@ void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
void smm_initialize(void);
void smm_relocate(void);
-/* These helpers are for performing SMM relocation. */
-void southbridge_trigger_smi(void);
-void southbridge_clear_smi_status(void);
-
/*
* The initialization of the southbridge is split into 2 compoments. One is
* for clearing the state in the SMM registers. The other is for enabling
@@ -80,8 +76,6 @@ static inline void smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
static inline void smm_initialize(void) {}
static inline void smm_relocate(void) {}
-static inline void southbridge_trigger_smi(void) {}
-static inline void southbridge_clear_smi_status(void) {}
static inline void southbridge_smm_clear_state(void) {}
static inline void southbridge_smm_enable_smi(void) {}
#endif /* CONFIG_HAVE_SMI_HANDLER */
diff --git a/src/soc/intel/skylake/smi.c b/src/soc/intel/skylake/smi.c
index 442607f2e7..734363713e 100644
--- a/src/soc/intel/skylake/smi.c
+++ b/src/soc/intel/skylake/smi.c
@@ -70,38 +70,6 @@ void southbridge_smm_enable_smi(void)
enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS);
}
-void southbridge_trigger_smi(void)
-{
- /*
- * There are several methods of raising a controlled SMI# via
- * software, among them:
- * - Writes to io 0xb2 (APMC)
- * - Writes to the Local Apic ICR with Delivery mode SMI.
- *
- * Using the local apic is a bit more tricky. According to
- * AMD Family 11 Processor BKDG no destination shorthand must be
- * used.
- * The whole SMM initialization is quite a bit hardware specific, so
- * I'm not too worried about the better of the methods at the moment
- */
-
- /* raise an SMI interrupt */
- printk(BIOS_SPEW, " ... raise SMI#\n");
- outb(0x00, 0xb2);
-}
-
-void southbridge_clear_smi_status(void)
-{
- /* Clear SMI status */
- clear_smi_status();
-
- /* Clear PM1 status */
- clear_pm1_status();
-
- /* Set EOS bit so other SMIs can occur. */
- enable_smi(EOS);
-}
-
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
/*