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-rw-r--r--src/soc/intel/apollolake/Kconfig13
-rw-r--r--src/soc/intel/apollolake/Makefile.inc6
2 files changed, 12 insertions, 7 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index bb0cc202da..c32b80f38f 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -32,13 +32,9 @@ config CPU_SPECIFIC_OPTIONS
select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
select SOC_INTEL_COMMON
select UDELAY_TSC
- select CONSOLE_SERIAL
- select BOOTBLOCK_CONSOLE
select TSC_CONSTANT_RATE
select UDELAY_TSC
select TSC_CONSTANT_RATE
- select NO_UART_ON_SUPERIO
- select DRIVERS_UART_8250MEM_32
config MMCONF_BASE_ADDRESS
hex "PCI MMIO Base Address"
@@ -75,6 +71,15 @@ config CONSOLE_UART_BASE_ADDRESS
hex "MMIO base address for UART"
default 0xde000000
+config SOC_UART_DEBUG
+ bool "Enable SoC UART debug port selected by UART_FOR_CONSOLE."
+ default n
+ select CONSOLE_SERIAL
+ select BOOTBLOCK_CONSOLE
+ select DRIVERS_UART
+ select DRIVERS_UART_8250MEM_32
+ select NO_UART_ON_SUPERIO
+
# 32KiB bootblock is all that is mapped in by the CSE at top of 4GiB.
config C_ENV_BOOTBLOCK_SIZE
hex
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 7f8beb0c62..76fa4c7050 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -13,16 +13,16 @@ bootblock-y += bootblock/bootblock.c
bootblock-y += gpio.c
bootblock-y += placeholders.c
bootblock-y += tsc_freq.c
-bootblock-y += uart_early.c
+bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
romstage-y += placeholders.c
romstage-y += gpio.c
-romstage-y += uart_early.c
+romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
smm-y += placeholders.c
ramstage-y += placeholders.c
ramstage-y += gpio.c
-ramstage-y += uart_early.c
+ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include