diff options
| -rw-r--r-- | src/mainboard/dell/s1850/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/eagleheights/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/jarrell/romstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/mtarvon/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/truxton/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dai_g/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhr_ig/romstage.c | 6 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhr_ig2/romstage.c | 6 |
10 files changed, 0 insertions, 49 deletions
diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c index d96e196dc7..6ebf88cb0b 100644 --- a/src/mainboard/dell/s1850/romstage.c +++ b/src/mainboard/dell/s1850/romstage.c @@ -20,9 +20,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1) #define DEVPRES_CONFIG ( \ @@ -35,9 +32,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0808090a -#define RECVENB_CONFIG 0x0808090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index 1d7c8d5028..0c29984049 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -59,9 +59,6 @@ #define UART_MSR 0x06 #define UART_SCR 0x07 -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c index 4df85cfe80..0220ec8fab 100644 --- a/src/mainboard/intel/jarrell/romstage.c +++ b/src/mainboard/intel/jarrell/romstage.c @@ -29,10 +29,6 @@ #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D6F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -/* Beta values: 0x00090800 */ -/* Silver values: 0x000a0900 */ -#define RECVENA_CONFIG 0x000a090a -#define RECVENB_CONFIG 0x000a090a #define DIMM_MAP_LOGICAL 0x0124 static inline int spd_read_byte(unsigned device, unsigned address) diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index cdd0ed5573..510f1ed609 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -38,9 +38,6 @@ #include "northbridge/intel/i3100/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 1a02f856ad..3ef60b893e 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -40,9 +40,6 @@ #include "cpu/x86/bist.h" #include "spd.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0) static inline int spd_read_byte(u16 device, u8 address) diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c index 6f8ea1264f..6a7d77b3bd 100644 --- a/src/mainboard/supermicro/x6dai_g/romstage.c +++ b/src/mainboard/supermicro/x6dai_g/romstage.c @@ -21,9 +21,6 @@ #include "northbridge/intel/e7525/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) @@ -36,9 +33,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0808090a -#define RECVENB_CONFIG 0x0808090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c index 745da9a059..64196b2fc5 100644 --- a/src/mainboard/supermicro/x6dhe_g/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g/romstage.c @@ -22,9 +22,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) @@ -37,9 +34,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0808090a -#define RECVENB_CONFIG 0x0808090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c index 6a2b2ea0c5..39cf5e778a 100644 --- a/src/mainboard/supermicro/x6dhe_g2/romstage.c +++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c @@ -20,9 +20,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP1) #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP2) @@ -35,9 +32,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0708090a -#define RECVENB_CONFIG 0x0708090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c index 9d56f5c3ac..4dc5efe94a 100644 --- a/src/mainboard/supermicro/x6dhr_ig/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c @@ -20,9 +20,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) @@ -36,9 +33,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0808090a -#define RECVENB_CONFIG 0x0808090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index a0f6b4951c..6d8e482463 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -20,9 +20,6 @@ #include "northbridge/intel/e7520/memory_initialized.c" #include "cpu/x86/bist.h" -#define SIO_GPIO_BASE 0x680 -#define SIO_XBUS_BASE 0x4880 - #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2) @@ -36,9 +33,6 @@ 0 ) #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0) -#define RECVENA_CONFIG 0x0808090a -#define RECVENB_CONFIG 0x0808090a - static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); 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