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-rw-r--r--src/vendorcode/cavium/bdk/libbdk-boot/bdk-boot-pcie.c1
-rw-r--r--src/vendorcode/cavium/bdk/libbdk-hal/bdk-pcie-cn8xxx.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/vendorcode/cavium/bdk/libbdk-boot/bdk-boot-pcie.c b/src/vendorcode/cavium/bdk/libbdk-boot/bdk-boot-pcie.c
index b03c2e03ee..d52d6e9053 100644
--- a/src/vendorcode/cavium/bdk/libbdk-boot/bdk-boot-pcie.c
+++ b/src/vendorcode/cavium/bdk/libbdk-boot/bdk-boot-pcie.c
@@ -61,6 +61,7 @@ void bdk_boot_pcie(void)
{
BDK_TRACE(INIT, "Initializing PCIe%d on Node %d\n", p, n);
bdk_pcie_rc_initialize(n, p);
+ bdk_watchdog_poke();
}
}
}
diff --git a/src/vendorcode/cavium/bdk/libbdk-hal/bdk-pcie-cn8xxx.c b/src/vendorcode/cavium/bdk/libbdk-hal/bdk-pcie-cn8xxx.c
index 16034d27c3..6675fd50e1 100644
--- a/src/vendorcode/cavium/bdk/libbdk-hal/bdk-pcie-cn8xxx.c
+++ b/src/vendorcode/cavium/bdk/libbdk-hal/bdk-pcie-cn8xxx.c
@@ -549,6 +549,7 @@ static uint32_t cfg_read32_retry(bdk_node_t node, int pcie_port, int bus, int de
return val;
/* Failed, wait a little and try again */
bdk_wait_usec(10000);
+ bdk_watchdog_poke();
} while (bdk_clock_get_count(BDK_CLOCK_TIME) < timeout);
BDK_TRACE(PCIE, "N%d.PCIe%d: Config read failed, can't communicate with device\n",
@@ -1123,6 +1124,7 @@ int bdk_pcie_rc_initialize(bdk_node_t node, int pcie_port)
return -1;
}
retry_count++;
+ bdk_watchdog_poke();
}
/* Errata PCIE-28816: Link retrain initiated at GEN1 can cause PCIE