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-rw-r--r--src/soc/intel/apollolake/chip.c7
-rw-r--r--src/soc/intel/apollolake/chip.h7
2 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 9cec08dcec..78c669d995 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -400,6 +400,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
/* Disable FSP from locking access to the RTC NVRAM */
silconfig->RtcLock = 0;
+
+ /* Enable Audio clk gate and power gate */
+ silconfig->HDAudioClkGate = cfg->hdaudio_clk_gate_enable;
+ silconfig->HDAudioPwrGate = cfg->hdaudio_pwr_gate_enable;
+ /* Bios config lockdown Audio clk and power gate */
+ silconfig->BiosCfgLockDown = cfg->hdaudio_bios_config_lockdown;
+
}
struct chip_operations soc_intel_apollolake_ops = {
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 22217a4dea..a9605b76a8 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -107,6 +107,13 @@ struct soc_intel_apollolake_config {
/* Enable DPTF support */
int dptf_enable;
+ /* Configure Audio clk gate and power gate
+ * IOSF-SB port ID 92 offset 0x530 [5] and [3]
+ */
+ uint8_t hdaudio_clk_gate_enable;
+ uint8_t hdaudio_pwr_gate_enable;
+ uint8_t hdaudio_bios_config_lockdown;
+
/* SLP S3 minimum assertion width. */
int slp_s3_assertion_width_usecs;
};