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-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params_jsl.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
index 56124f4c04..9c70f2ece1 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
@@ -95,7 +95,11 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->DdiPortCDdc = config->DdiPortCDdc;
/* Audio */
- m_cfg->PchHdaEnable = pcidev_path_on_root(PCH_DEVFN_HDA) ? dev->enabled : 0;
+ dev = pcidev_path_on_root(PCH_DEVFN_HDA);
+ if (!dev)
+ m_cfg->PchHdaEnable = 0;
+ else
+ m_cfg->PchHdaEnable = dev->enabled;
m_cfg->PchHdaDspEnable = config->PchHdaDspEnable;
m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;