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-rw-r--r--src/soc/mediatek/mt8173/mmu_operations.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8173/mmu_operations.c b/src/soc/mediatek/mt8173/mmu_operations.c
index a70fe2ccaa..744248acdf 100644
--- a/src/soc/mediatek/mt8173/mmu_operations.c
+++ b/src/soc/mediatek/mt8173/mmu_operations.c
@@ -30,8 +30,8 @@ void mt8173_mmu_init(void)
{
mmu_init();
- /* Set 0x0 to end of dram as device memory */
- mmu_config_range((void *)0, (uintptr_t)_dram + dram_size, DEV_MEM);
+ /* Set 0x0 to the end of 2GB dram address as device memory */
+ mmu_config_range((void *)0, (uintptr_t)_dram + 2U * GiB, DEV_MEM);
/* SRAM is cached */
mmu_config_range(_sram_l2c, _sram_l2c_size + _sram_size, CACHED_MEM);
@@ -47,7 +47,7 @@ void mt8173_mmu_init(void)
void mt8173_mmu_after_dram(void)
{
- /* Remap DRAM as cached now that it's up and running */
+ /* Map DRAM as cached now that it's up and running */
mmu_config_range(_dram, dram_size, CACHED_MEM);
/* Unmap L2C SRAM so it can be reclaimed by L2 cache */