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-rw-r--r--src/soc/intel/common/block/include/intelblocks/xhci.h22
-rw-r--r--src/soc/intel/common/block/xhci/Kconfig4
-rw-r--r--src/soc/intel/common/block/xhci/Makefile.inc1
-rw-r--r--src/soc/intel/common/block/xhci/xhci.c44
4 files changed, 71 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h
new file mode 100644
index 0000000000..ea1f6828e8
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/xhci.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_COMMON_BLOCK_XHCI_H
+#define SOC_INTEL_COMMON_BLOCK_XHCI_H
+
+void soc_xhci_init(struct device *dev);
+
+#endif /* SOC_INTEL_COMMON_BLOCK_XHCI_H */
+
diff --git a/src/soc/intel/common/block/xhci/Kconfig b/src/soc/intel/common/block/xhci/Kconfig
new file mode 100644
index 0000000000..c8fd5fdbd1
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/Kconfig
@@ -0,0 +1,4 @@
+config SOC_INTEL_COMMON_BLOCK_XHCI
+ bool
+ help
+ Intel Processor common XHCI support
diff --git a/src/soc/intel/common/block/xhci/Makefile.inc b/src/soc/intel/common/block/xhci/Makefile.inc
new file mode 100644
index 0000000000..43bdf1b29f
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
new file mode 100644
index 0000000000..32fad93d3a
--- /dev/null
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include <intelblocks/xhci.h>
+
+__attribute__((weak)) void soc_xhci_init(struct device *dev) { /* no-op */ }
+
+static struct device_operations usb_xhci_ops = {
+ .read_resources = &pci_dev_read_resources,
+ .set_resources = &pci_dev_set_resources,
+ .enable_resources = &pci_dev_enable_resources,
+ .init = soc_xhci_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+ 0x5aa8, /* ApolloLake */
+ 0x31a8, /* GLK */
+ 0x9d2f, /* SunRisePoint LP */
+ 0xa12f, /* KBL-H*/
+ 0
+};
+
+static const struct pci_driver pch_usb_xhci __pci_driver = {
+ .ops = &usb_xhci_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .devices = pci_device_ids,
+};