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-rw-r--r--src/southbridge/amd/agesa/hudson/enable_usbdebug.c3
-rw-r--r--src/southbridge/amd/sb800/enable_usbdebug.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index c74ac9ac61..128885a525 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -50,6 +50,7 @@ void enable_usbdebug(unsigned int port)
pci_write_config32(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2),
EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
- pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */
+ pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2),
+ PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
set_debug_port(port);
}
diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c
index f085eabecb..28a1665647 100644
--- a/src/southbridge/amd/sb800/enable_usbdebug.c
+++ b/src/southbridge/amd/sb800/enable_usbdebug.c
@@ -50,6 +50,7 @@ void enable_usbdebug(unsigned int port)
pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2),
EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
- pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */
+ pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2),
+ PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
set_debug_port(port);
}