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-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c2
-rw-r--r--src/cpu/amd/model_gx2/cpubug.c2
-rw-r--r--src/cpu/amd/sc520/sc520.c9
-rw-r--r--src/mainboard/amd/dbm690t/mptable.c2
-rw-r--r--src/mainboard/amd/dbm690t/romstage.c2
-rw-r--r--src/mainboard/amd/mahogany/mainboard.c8
-rw-r--r--src/mainboard/amd/mahogany/mptable.c2
-rw-r--r--src/mainboard/amd/mahogany/romstage.c2
-rw-r--r--src/mainboard/amd/mahogany_fam10/mainboard.c8
-rw-r--r--src/mainboard/amd/mahogany_fam10/mptable.c2
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c4
-rw-r--r--src/mainboard/amd/pistachio/mptable.c2
-rw-r--r--src/mainboard/amd/pistachio/romstage.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/mptable.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/romstage.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Kconfig5
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/mptable.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c4
-rw-r--r--src/mainboard/asus/a8n_e/irq_tables.c2
-rw-r--r--src/mainboard/asus/a8n_e/mptable.c2
-rw-r--r--src/mainboard/asus/a8v-e_se/mptable.c2
-rw-r--r--src/mainboard/asus/p2b-d/mptable.c2
-rw-r--r--src/mainboard/asus/p2b-ds/mptable.c2
-rw-r--r--src/mainboard/broadcom/blast/irq_tables.c2
-rw-r--r--src/mainboard/broadcom/blast/mptable.c2
-rw-r--r--src/mainboard/dell/s1850/reset.c18
-rw-r--r--src/mainboard/digitallogic/msm586seg/mainboard.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/mptable.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/romstage.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/irq_tables.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/mptable.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/romstage.c2
-rw-r--r--src/mainboard/hp/dl145_g3/mptable.c4
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c2
-rw-r--r--src/mainboard/ibm/e325/mptable.c2
-rw-r--r--src/mainboard/ibm/e326/mptable.c2
-rw-r--r--src/mainboard/intel/eagleheights/mptable.c2
-rw-r--r--src/mainboard/intel/eagleheights/reset.c16
-rw-r--r--src/mainboard/intel/jarrell/mptable.c2
-rw-r--r--src/mainboard/intel/jarrell/reset.c1
-rw-r--r--src/mainboard/intel/mtarvon/mptable.c2
-rw-r--r--src/mainboard/intel/truxton/mptable.c2
-rw-r--r--src/mainboard/intel/xe7501devkit/mptable.c2
-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8s2/mptable.c2
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8x/mptable.c2
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c2
-rw-r--r--src/mainboard/kontron/kt690/mptable.c2
-rw-r--r--src/mainboard/kontron/kt690/romstage.c2
-rw-r--r--src/mainboard/msi/ms7135/irq_tables.c2
-rw-r--r--src/mainboard/msi/ms7135/mptable.c2
-rw-r--r--src/mainboard/msi/ms7260/irq_tables.c2
-rw-r--r--src/mainboard/msi/ms7260/mptable.c2
-rw-r--r--src/mainboard/msi/ms7260/romstage.c7
-rw-r--r--src/mainboard/msi/ms9185/irq_tables.c2
-rw-r--r--src/mainboard/msi/ms9185/mptable.c2
-rw-r--r--src/mainboard/msi/ms9185/romstage.c2
-rw-r--r--src/mainboard/msi/ms9282/irq_tables.c2
-rw-r--r--src/mainboard/msi/ms9282/mptable.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/get_bus_conf.c4
-rw-r--r--src/mainboard/msi/ms9652_fam10/irq_tables.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/mptable.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c4
-rw-r--r--src/mainboard/newisys/khepri/mptable.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/irq_tables.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/mptable.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c2
-rw-r--r--src/mainboard/olpc/btest/mainboard.c2
-rw-r--r--src/mainboard/olpc/rev_a/mainboard.c2
-rw-r--r--src/mainboard/rca/rm4100/mainboard_smi.c1
-rw-r--r--src/mainboard/sunw/ultra40/irq_tables.c2
-rw-r--r--src/mainboard/sunw/ultra40/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dme/irq_tables.c2
-rw-r--r--src/mainboard/supermicro/h8dme/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dme/romstage.c6
-rw-r--r--src/mainboard/supermicro/h8dmr/irq_tables.c2
-rw-r--r--src/mainboard/supermicro/h8dmr/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dmr/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/irq_tables.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c4
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/irq_tables.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c4
-rw-r--r--src/mainboard/supermicro/x6dai_g/mptable.c2
-rw-r--r--src/mainboard/supermicro/x6dai_g/reset.c17
-rw-r--r--src/mainboard/supermicro/x6dhe_g/mptable.c2
-rw-r--r--src/mainboard/supermicro/x6dhe_g/reset.c17
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/mptable.c2
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/reset.c17
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/mptable.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/reset.c17
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/mptable.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/reset.c17
-rw-r--r--src/mainboard/technexion/tim5690/mptable.c2
-rw-r--r--src/mainboard/technexion/tim5690/romstage.c2
-rw-r--r--src/mainboard/technexion/tim8690/mptable.c2
-rw-r--r--src/mainboard/technexion/tim8690/romstage.c2
-rw-r--r--src/mainboard/technologic/ts5300/mainboard.c7
-rw-r--r--src/mainboard/tyan/s2735/mptable.c2
-rw-r--r--src/mainboard/tyan/s2850/mptable.c2
-rw-r--r--src/mainboard/tyan/s2875/mptable.c2
-rw-r--r--src/mainboard/tyan/s2880/mptable.c2
-rw-r--r--src/mainboard/tyan/s2881/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2881/mptable.c2
-rw-r--r--src/mainboard/tyan/s2882/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2882/mptable.c2
-rw-r--r--src/mainboard/tyan/s2885/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2885/mptable.c2
-rw-r--r--src/mainboard/tyan/s2891/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2891/mptable.c2
-rw-r--r--src/mainboard/tyan/s2912/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2912/mptable.c2
-rw-r--r--src/mainboard/tyan/s2912/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/mptable.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c4
-rw-r--r--src/mainboard/tyan/s4880/mptable.c2
-rw-r--r--src/mainboard/tyan/s4882/mptable.c2
-rw-r--r--src/mainboard/via/epia-m/vgabios.c9
-rw-r--r--src/mainboard/via/epia-n/mptable.c2
-rw-r--r--src/mainboard/via/pc2500e/mptable.c2
-rw-r--r--src/mainboard/via/vt8454c/mptable.c2
-rw-r--r--src/northbridge/amd/amdfam10/amdfam10_acpi.c2
-rw-r--r--src/northbridge/amd/amdfam10/debug.c2
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c2
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c2
-rw-r--r--src/northbridge/amd/amdk8/raminit_f_dqs.c2
-rw-r--r--src/northbridge/amd/gx2/northbridge.c4
-rw-r--r--src/northbridge/amd/gx2/northbridgeinit.c26
-rw-r--r--src/northbridge/amd/lx/northbridge.c2
-rw-r--r--src/northbridge/intel/i3100/pciexp_porta_ep80579.c1
-rw-r--r--src/northbridge/intel/i82810/northbridge.c2
-rw-r--r--src/northbridge/intel/i855/northbridge.c9
-rw-r--r--src/northbridge/via/cn400/northbridge.c2
-rw-r--r--src/northbridge/via/cn400/vgabios.c9
-rw-r--r--src/northbridge/via/cn700/northbridge.c2
-rw-r--r--src/northbridge/via/cn700/vgabios.c9
-rw-r--r--src/northbridge/via/cx700/vgabios.c8
-rw-r--r--src/northbridge/via/vt8623/northbridge.c2
-rw-r--r--src/northbridge/via/vx800/northbridge.c2
-rw-r--r--src/northbridge/via/vx800/vgabios.c8
-rw-r--r--src/southbridge/amd/rs780/rs780_pcie.c2
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_lpc.c2
-rw-r--r--src/southbridge/intel/i3100/i3100_lpc.c2
-rw-r--r--src/southbridge/intel/i3100/i3100_reset.c1
-rw-r--r--src/southbridge/intel/i82801ax/i82801ax_lpc.c8
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_reset.c3
-rw-r--r--src/southbridge/intel/i82870/p64h2_ioapic.c2
-rw-r--r--src/southbridge/nvidia/ck804/ck804_nic.c8
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_aza.c2
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_lpc.c4
-rw-r--r--src/southbridge/ricoh/rl5c476/rl5c476.c2
-rw-r--r--src/southbridge/sis/sis966/sis966_aza.c4
-rw-r--r--src/southbridge/sis/sis966/sis966_early_smbus.c2
-rw-r--r--src/southbridge/sis/sis966/sis966_lpc.c2
-rw-r--r--src/southbridge/sis/sis966/sis966_nic.c4
-rw-r--r--src/southbridge/sis/sis966/sis966_usb2.c2
-rw-r--r--src/superio/via/vt1211/vt1211.c4
162 files changed, 227 insertions, 337 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 939990997c..7f14b1eb8d 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -97,7 +97,7 @@ static void post_cache_as_ram(void)
/* clear only coreboot used region of memory. Note: this may break ECC enabled boards */
memset((void*) CONFIG_RAMBASE, 0, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE);
#else
- memset((void*)0, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE));
+ //memset((void*)CONFIG_RAMBASE, 0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE - 0xa0000));
#endif
print_debug("Done\r\n");
diff --git a/src/cpu/amd/model_gx2/cpubug.c b/src/cpu/amd/model_gx2/cpubug.c
index fcee30bb23..20284e04c2 100644
--- a/src/cpu/amd/model_gx2/cpubug.c
+++ b/src/cpu/amd/model_gx2/cpubug.c
@@ -356,7 +356,7 @@ cpubug(void)
rev = msr.lo & 0xff;
if (rev < 0x20) {
- printk(BIOS_ERR, "%s: rev < 0x20! bailing!\n");
+ printk(BIOS_ERR, "%s: rev < 0x20! bailing!\n", __func__);
return;
}
printk(BIOS_DEBUG, "Doing cpubug fixes for rev 0x%x\n", rev);
diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c
index 3ab65c2ae1..07991825cd 100644
--- a/src/cpu/amd/sc520/sc520.c
+++ b/src/cpu/amd/sc520/sc520.c
@@ -12,11 +12,12 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
+#include <delay.h>
#include "chip.h"
/* hack for now */
-void sc520_udelay(int microseconds) {
+static void sc520_udelay(int microseconds) {
volatile int x;
for(x = 0; x < 1000; x++)
;
@@ -24,7 +25,7 @@ void sc520_udelay(int microseconds) {
/* looks like we define this now */
void
-udelay(int microseconds) {
+udelay(unsigned microseconds) {
sc520_udelay(microseconds);
}
/*
@@ -46,7 +47,7 @@ static void cpu_init(device_t dev)
* there is no real northbridge, keep it here in cpu.
* Ron wins, he's writing the code.
*/
-void sc520_enable_resources(struct device *dev) {
+static void sc520_enable_resources(struct device *dev) {
unsigned char command;
printk(BIOS_SPEW, "%s\n", __func__);
@@ -100,7 +101,7 @@ static void ram_resource(device_t dev, unsigned long index,
unsigned long basek, unsigned long sizek)
{
struct resource *resource;
- printk(BIOS_SPEW, "%s sizek 0x%x\n", __func__, sizek);
+ printk(BIOS_SPEW, "%s sizek 0x%lx\n", __func__, sizek);
if (!sizek) {
return;
}
diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c
index 3b7ffdaa4b..d5610eb12b 100644
--- a/src/mainboard/amd/dbm690t/mptable.c
+++ b/src/mainboard/amd/dbm690t/mptable.c
@@ -38,7 +38,7 @@ extern u32 sbdn_sb600;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "ATI ";
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c
index 8e5ffb3e73..df960e49fb 100644
--- a/src/mainboard/amd/dbm690t/romstage.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
@@ -188,7 +188,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/amd/mahogany/mainboard.c b/src/mainboard/amd/mahogany/mainboard.c
index 73ff5198ee..ed0f50a5a4 100644
--- a/src/mainboard/amd/mahogany/mainboard.c
+++ b/src/mainboard/amd/mahogany/mainboard.c
@@ -153,10 +153,10 @@ int add_mainboard_resources(struct lb_memory *mem)
* in some circumstances we want the memory mentioned as reserved.
*/
#if (CONFIG_GFXUMA == 1)
- printk(BIOS_INFO, "uma_memory_start=0x%x, uma_memory_size=0x%x \n",
- uma_memory_base, uma_memory_size);
- lb_add_memory_range(mem, LB_MEM_RESERVED,
- uma_memory_base, uma_memory_size);
+ printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
+ uma_memory_base, uma_memory_size);
+ lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
+ uma_memory_size);
#endif
}
diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c
index 7a2701711b..6a922fbc05 100644
--- a/src/mainboard/amd/mahogany/mptable.c
+++ b/src/mainboard/amd/mahogany/mptable.c
@@ -39,7 +39,7 @@ extern u32 sbdn_sb700;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "AMD ";
diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c
index c14d7c0a63..7a09aa70d8 100644
--- a/src/mainboard/amd/mahogany/romstage.c
+++ b/src/mainboard/amd/mahogany/romstage.c
@@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index 73ff5198ee..ed0f50a5a4 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -153,10 +153,10 @@ int add_mainboard_resources(struct lb_memory *mem)
* in some circumstances we want the memory mentioned as reserved.
*/
#if (CONFIG_GFXUMA == 1)
- printk(BIOS_INFO, "uma_memory_start=0x%x, uma_memory_size=0x%x \n",
- uma_memory_base, uma_memory_size);
- lb_add_memory_range(mem, LB_MEM_RESERVED,
- uma_memory_base, uma_memory_size);
+ printk(BIOS_INFO, "uma_memory_start=0x%llx, uma_memory_size=0x%llx \n",
+ uma_memory_base, uma_memory_size);
+ lb_add_memory_range(mem, LB_MEM_RESERVED, uma_memory_base,
+ uma_memory_size);
#endif
}
diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index 92c6e275a0..64536066dc 100644
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -39,7 +39,7 @@ extern u32 sbdn_sb700;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "AMD ";
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index d0d057c9d7..2a147fea8a 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -184,9 +184,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// Load MPB
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c
index c1e2f4e314..12bb3ddac4 100644
--- a/src/mainboard/amd/pistachio/mptable.c
+++ b/src/mainboard/amd/pistachio/mptable.c
@@ -38,7 +38,7 @@ extern u32 sbdn_sb600;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "ATI ";
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index 1b98ab42b5..8184cb29a2 100644
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c
index 88c34df155..3e1e9b276e 100644
--- a/src/mainboard/amd/serengeti_cheetah/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah/mptable.c
@@ -12,7 +12,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "AMD ";
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index 0bf5864870..e29af87505 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -208,7 +208,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_mb_resource_map();
#if 0
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
index f74e40c577..5700581496 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -64,6 +64,11 @@ config MAX_PHYSICAL_CPUS
default 8
depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+config LOGICAL_CPUS
+ bool
+ default n
+ depends on BOARD_AMD_SERENGETI_CHEETAH_FAM10
+
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c
index 7cd5945f95..a2197e37bc 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/irq_tables.c
@@ -70,7 +70,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (u8 *)(addr);
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
index 72ded3e87d..9627151560 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "AMD ";
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 7c8707f660..8244746c1e 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -186,9 +186,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// Load MPB
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/asus/a8n_e/irq_tables.c b/src/mainboard/asus/a8n_e/irq_tables.c
index eeea8d0c27..a43350b600 100644
--- a/src/mainboard/asus/a8n_e/irq_tables.c
+++ b/src/mainboard/asus/a8n_e/irq_tables.c
@@ -78,7 +78,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000. */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/asus/a8n_e/mptable.c b/src/mainboard/asus/a8n_e/mptable.c
index ebfe7efa6b..29305bbcda 100644
--- a/src/mainboard/asus/a8n_e/mptable.c
+++ b/src/mainboard/asus/a8n_e/mptable.c
@@ -34,7 +34,7 @@ extern unsigned apicid_ck804;
extern unsigned bus_type[256];
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "ASUS ";
diff --git a/src/mainboard/asus/a8v-e_se/mptable.c b/src/mainboard/asus/a8v-e_se/mptable.c
index e572af8610..53187a0c8b 100644
--- a/src/mainboard/asus/a8v-e_se/mptable.c
+++ b/src/mainboard/asus/a8v-e_se/mptable.c
@@ -23,7 +23,7 @@
#include <../../../southbridge/via/vt8237r/vt8237r.h>
#include <../../../southbridge/via/k8t890/k8t890.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXB ";
diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c
index 03bc613031..b237c56050 100644
--- a/src/mainboard/asus/p2b-d/mptable.c
+++ b/src/mainboard/asus/p2b-d/mptable.c
@@ -24,7 +24,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "COREBOOT";
diff --git a/src/mainboard/asus/p2b-ds/mptable.c b/src/mainboard/asus/p2b-ds/mptable.c
index e5bfdcd3a7..2e1c275cce 100644
--- a/src/mainboard/asus/p2b-ds/mptable.c
+++ b/src/mainboard/asus/p2b-ds/mptable.c
@@ -24,7 +24,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "COREBOOT";
diff --git a/src/mainboard/broadcom/blast/irq_tables.c b/src/mainboard/broadcom/blast/irq_tables.c
index 0bc556c967..2dcd9a71b3 100644
--- a/src/mainboard/broadcom/blast/irq_tables.c
+++ b/src/mainboard/broadcom/blast/irq_tables.c
@@ -60,7 +60,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index 497ac464fc..313a34a67c 100644
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -21,7 +21,7 @@ extern unsigned sbdn2;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "BROADCOM";
diff --git a/src/mainboard/dell/s1850/reset.c b/src/mainboard/dell/s1850/reset.c
index 293ad72663..d00e6181a9 100644
--- a/src/mainboard/dell/s1850/reset.c
+++ b/src/mainboard/dell/s1850/reset.c
@@ -1,5 +1,5 @@
#include <arch/io.h>
-
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -25,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/digitallogic/msm586seg/mainboard.c b/src/mainboard/digitallogic/msm586seg/mainboard.c
index cfc1a21ca3..49353f7573 100644
--- a/src/mainboard/digitallogic/msm586seg/mainboard.c
+++ b/src/mainboard/digitallogic/msm586seg/mainboard.c
@@ -26,7 +26,7 @@ static void irqdump()
printk(BIOS_ERR, "mmcr is %p\n", mmcr);
for(i = 0; irqlist[i] >= 0; i++) {
irq = mmcr + irqlist[i];
- printk(BIOS_ERR, "0x%x register @%p is 0x%lx\n", irqlist[i], irq, *irq);
+ printk(BIOS_ERR, "0x%x register @%p is 0x%x\n", irqlist[i], irq, *irq);
}
}
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c b/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
index de9a5a04d6..0b3b407dcb 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
@@ -77,7 +77,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
index c765a56402..2e93453297 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
@@ -35,7 +35,7 @@ extern unsigned apicid_sis966;
extern unsigned bus_type[256];
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "GIGABYTE";
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 1819b901c8..e1b048ac5a 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -218,7 +218,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
early_usbdebug_direct_init();
#endif
console_init();
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
diff --git a/src/mainboard/gigabyte/m57sli/irq_tables.c b/src/mainboard/gigabyte/m57sli/irq_tables.c
index 4aaf1497f0..284abfe4db 100644
--- a/src/mainboard/gigabyte/m57sli/irq_tables.c
+++ b/src/mainboard/gigabyte/m57sli/irq_tables.c
@@ -75,7 +75,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index 9002facd43..ce765c10ca 100644
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -36,7 +36,7 @@ extern unsigned bus_type[256];
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "GIGABYTE";
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 4226ac3614..2073b98971 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -232,7 +232,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
early_usbdebug_direct_init();
#endif
console_init();
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c
index aef2bf978a..0939b5801f 100644
--- a/src/mainboard/hp/dl145_g3/mptable.c
+++ b/src/mainboard/hp/dl145_g3/mptable.c
@@ -43,7 +43,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "HP ";
@@ -101,7 +101,7 @@ void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- printk(BIOS_DEBUG, "APIC %d base address: %x\n",m->apicid_bcm5785[i], res->base);
+ printk(BIOS_DEBUG, "APIC %d base address: %llx\n",m->apicid_bcm5785[i], res->base);
smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, res->base);
}
}
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 64b1c79b72..33e7207304 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -236,7 +236,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
console_init();
// setup_early_ipmi_serial();
pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
diff --git a/src/mainboard/ibm/e325/mptable.c b/src/mainboard/ibm/e325/mptable.c
index dc5cc429bf..dc95e95b02 100644
--- a/src/mainboard/ibm/e325/mptable.c
+++ b/src/mainboard/ibm/e325/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "IBM ";
diff --git a/src/mainboard/ibm/e326/mptable.c b/src/mainboard/ibm/e326/mptable.c
index dc5cc429bf..dc95e95b02 100644
--- a/src/mainboard/ibm/e326/mptable.c
+++ b/src/mainboard/ibm/e326/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "IBM ";
diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c
index d83bdb81fb..f55ee400cc 100644
--- a/src/mainboard/intel/eagleheights/mptable.c
+++ b/src/mainboard/intel/eagleheights/mptable.c
@@ -58,7 +58,7 @@
#define RCBA_D29IR 0x3144
#define RCBA_D28IR 0x3146
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "Intel ";
diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c
index 09308e4678..1388bcf6b4 100644
--- a/src/mainboard/intel/eagleheights/reset.c
+++ b/src/mainboard/intel/eagleheights/reset.c
@@ -20,6 +20,7 @@
*/
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -45,18 +46,3 @@ void hard_reset(void)
{
outb(0x06, 0xcf9);
}
-
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_3100_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
- }
- outb(0x0e, 0xcf9);
-}
-
diff --git a/src/mainboard/intel/jarrell/mptable.c b/src/mainboard/intel/jarrell/mptable.c
index f9d20f2787..c75657982a 100644
--- a/src/mainboard/intel/jarrell/mptable.c
+++ b/src/mainboard/intel/jarrell/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c
index 5364632346..3b79e439e2 100644
--- a/src/mainboard/intel/jarrell/reset.c
+++ b/src/mainboard/intel/jarrell/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c
index 1090af1e99..749745df43 100644
--- a/src/mainboard/intel/mtarvon/mptable.c
+++ b/src/mainboard/intel/mtarvon/mptable.c
@@ -26,7 +26,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "Intel ";
diff --git a/src/mainboard/intel/truxton/mptable.c b/src/mainboard/intel/truxton/mptable.c
index 94facfe717..64ebc20199 100644
--- a/src/mainboard/intel/truxton/mptable.c
+++ b/src/mainboard/intel/truxton/mptable.c
@@ -24,7 +24,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "Intel ";
diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index 6d911049bd..83bab51523 100644
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -142,7 +142,7 @@ void xe7501devkit_register_interrupts(struct mp_config_table *mc)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE |MP_IRQ_POLARITY_HIGH, SUPERIO_BUS, 15, IOAPIC_ICH3, 15);
}
-void* smp_write_config_table(void* v)
+static void *smp_write_config_table(void* v)
{
static const char sig[4] = MPC_SIGNATURE;
static const char oem[8] = "INTEL ";
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 901b18fe5f..ca080e6d93 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -168,7 +168,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_mb_resource_map();
diff --git a/src/mainboard/iwill/dk8s2/mptable.c b/src/mainboard/iwill/dk8s2/mptable.c
index 867bd93234..24d31ab9e2 100644
--- a/src/mainboard/iwill/dk8s2/mptable.c
+++ b/src/mainboard/iwill/dk8s2/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "IWILL ";
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index 6231fd9962..eb29d10a21 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -168,7 +168,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_default_resource_map();
diff --git a/src/mainboard/iwill/dk8x/mptable.c b/src/mainboard/iwill/dk8x/mptable.c
index 867bd93234..24d31ab9e2 100644
--- a/src/mainboard/iwill/dk8x/mptable.c
+++ b/src/mainboard/iwill/dk8x/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "IWILL ";
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index 9c1487374f..6128e0cd2e 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_default_resource_map();
diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c
index ec1695e6ae..d84f31f0c0 100644
--- a/src/mainboard/kontron/kt690/mptable.c
+++ b/src/mainboard/kontron/kt690/mptable.c
@@ -38,7 +38,7 @@ extern u32 sbdn_sb600;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "KONTRON ";
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index 8ea8e6eae1..cff33f97f3 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -191,7 +191,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/msi/ms7135/irq_tables.c b/src/mainboard/msi/ms7135/irq_tables.c
index 98591d71eb..d870eb236d 100644
--- a/src/mainboard/msi/ms7135/irq_tables.c
+++ b/src/mainboard/msi/ms7135/irq_tables.c
@@ -91,7 +91,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *) (addr);
diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c
index 874b54b322..109ac2f2c3 100644
--- a/src/mainboard/msi/ms7135/mptable.c
+++ b/src/mainboard/msi/ms7135/mptable.c
@@ -38,7 +38,7 @@ extern unsigned bus_type[256];
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "MSI ";
diff --git a/src/mainboard/msi/ms7260/irq_tables.c b/src/mainboard/msi/ms7260/irq_tables.c
index b9e3b26e6c..f930b9eddb 100644
--- a/src/mainboard/msi/ms7260/irq_tables.c
+++ b/src/mainboard/msi/ms7260/irq_tables.c
@@ -71,7 +71,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 and 0x100000. */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/msi/ms7260/mptable.c b/src/mainboard/msi/ms7260/mptable.c
index b830eb8173..7dad26c852 100644
--- a/src/mainboard/msi/ms7260/mptable.c
+++ b/src/mainboard/msi/ms7260/mptable.c
@@ -33,7 +33,7 @@ extern unsigned bus_type[256];
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "MSI ";
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index f2e654bb6d..c28df63d5c 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -190,12 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
console_init();
- print_debug("*sysinfo range: [");
- print_debug_hex32(sysinfo);
- print_debug(",");
- print_debug_hex32((unsigned long)sysinfo + sizeof(struct sys_info));
- print_debug(")\r\n");
-
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid=");
print_debug_hex8(bsp_apicid);
print_debug("\r\n");
diff --git a/src/mainboard/msi/ms9185/irq_tables.c b/src/mainboard/msi/ms9185/irq_tables.c
index 0ccd722792..64832d6f87 100644
--- a/src/mainboard/msi/ms9185/irq_tables.c
+++ b/src/mainboard/msi/ms9185/irq_tables.c
@@ -82,7 +82,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c
index 83c8f90714..6bfaf5c131 100644
--- a/src/mainboard/msi/ms9185/mptable.c
+++ b/src/mainboard/msi/ms9185/mptable.c
@@ -40,7 +40,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[3] = "MSI";
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index fd4aa1e21e..e403bdfb02 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -203,7 +203,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_ms9185_resource_map();
#if 0
diff --git a/src/mainboard/msi/ms9282/irq_tables.c b/src/mainboard/msi/ms9282/irq_tables.c
index 4ba6b639cc..aedeab8c20 100644
--- a/src/mainboard/msi/ms9282/irq_tables.c
+++ b/src/mainboard/msi/ms9282/irq_tables.c
@@ -79,7 +79,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/msi/ms9282/mptable.c b/src/mainboard/msi/ms9282/mptable.c
index 39c08ff52d..02a4ede25b 100644
--- a/src/mainboard/msi/ms9282/mptable.c
+++ b/src/mainboard/msi/ms9282/mptable.c
@@ -34,7 +34,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "MSI ";
diff --git a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
index 52f687ab61..fc7feafb03 100644
--- a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
+++ b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
@@ -131,10 +131,10 @@ void get_bus_conf(void)
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
- printk(BIOS_SPEW, "CONFIG_LOGICAL_CPUS==1: apicid_base: %08x\n");
+ printk(BIOS_SPEW, "CONFIG_LOGICAL_CPUS==1: apicid_base: %08x\n", apicid_base);
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
- printk(BIOS_SPEW, "CONFIG_LOGICAL_CPUS==0: apicid_base: %08x\n");
+ printk(BIOS_SPEW, "CONFIG_LOGICAL_CPUS==0: apicid_base: %08x\n", apicid_base);
#endif
m->apicid_mcp55 = apicid_base+0;
}
diff --git a/src/mainboard/msi/ms9652_fam10/irq_tables.c b/src/mainboard/msi/ms9652_fam10/irq_tables.c
index b3628b65c5..d888c836e4 100644
--- a/src/mainboard/msi/ms9652_fam10/irq_tables.c
+++ b/src/mainboard/msi/ms9652_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/msi/ms9652_fam10/mptable.c b/src/mainboard/msi/ms9652_fam10/mptable.c
index b877c84ece..89ab4cf82d 100644
--- a/src/mainboard/msi/ms9652_fam10/mptable.c
+++ b/src/mainboard/msi/ms9652_fam10/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "MSI ";
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 7a84f53429..763a2b84bf 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -212,9 +212,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x\n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x\n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/newisys/khepri/mptable.c b/src/mainboard/newisys/khepri/mptable.c
index 03ee960d43..e0b84a0e3e 100644
--- a/src/mainboard/newisys/khepri/mptable.c
+++ b/src/mainboard/newisys/khepri/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "NEWISYS ";
diff --git a/src/mainboard/nvidia/l1_2pvv/irq_tables.c b/src/mainboard/nvidia/l1_2pvv/irq_tables.c
index b82293e549..28c597b9bd 100644
--- a/src/mainboard/nvidia/l1_2pvv/irq_tables.c
+++ b/src/mainboard/nvidia/l1_2pvv/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/nvidia/l1_2pvv/mptable.c b/src/mainboard/nvidia/l1_2pvv/mptable.c
index 9564006247..bdc2c43853 100644
--- a/src/mainboard/nvidia/l1_2pvv/mptable.c
+++ b/src/mainboard/nvidia/l1_2pvv/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "NVIDIA ";
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index ad04b5eeb3..edc289fbac 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -218,7 +218,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
early_usbdebug_direct_init();
#endif
console_init();
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
diff --git a/src/mainboard/olpc/btest/mainboard.c b/src/mainboard/olpc/btest/mainboard.c
index 6df993eca4..10c6e79f1f 100644
--- a/src/mainboard/olpc/btest/mainboard.c
+++ b/src/mainboard/olpc/btest/mainboard.c
@@ -61,7 +61,7 @@ static void init_dcon(void) {
/* Enable the DCON */
ret = do_smbus_write_word(iobase, 0x0D << 1, 0x01, 0x0069);
if (ret != 0)
- printk(BIOS_DEBUG, "DCON ENABLE FAILED\n", ret);
+ printk(BIOS_DEBUG, "DCON ENABLE FAILED %d\n", ret);
}
else
printk(BIOS_DEBUG, "DCON NOT FOUND (%x)\n", rev);
diff --git a/src/mainboard/olpc/rev_a/mainboard.c b/src/mainboard/olpc/rev_a/mainboard.c
index 539603dab2..a02e583558 100644
--- a/src/mainboard/olpc/rev_a/mainboard.c
+++ b/src/mainboard/olpc/rev_a/mainboard.c
@@ -60,7 +60,7 @@ static void init_dcon(void) {
/* Enable the DCON */
ret = do_smbus_write_word(iobase, 0x0D << 1, 0x01, 0x0069);
if (ret != 0)
- printk(BIOS_DEBUG, "DCON ENABLE FAILED\n", ret);
+ printk(BIOS_DEBUG, "DCON ENABLE FAILED %d\n", ret);
}
else
printk(BIOS_DEBUG, "DCON NOT FOUND (%x)\n", rev);
diff --git a/src/mainboard/rca/rm4100/mainboard_smi.c b/src/mainboard/rca/rm4100/mainboard_smi.c
index 0b0d57be63..8cfefaebe3 100644
--- a/src/mainboard/rca/rm4100/mainboard_smi.c
+++ b/src/mainboard/rca/rm4100/mainboard_smi.c
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <console/console.h>
+#include <cpu/x86/smm.h>
int mainboard_io_trap_handler(int smif)
{
diff --git a/src/mainboard/sunw/ultra40/irq_tables.c b/src/mainboard/sunw/ultra40/irq_tables.c
index c5a9059366..279504b0e1 100644
--- a/src/mainboard/sunw/ultra40/irq_tables.c
+++ b/src/mainboard/sunw/ultra40/irq_tables.c
@@ -71,7 +71,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c
index 68bab550b4..662b6b7e1c 100644
--- a/src/mainboard/sunw/ultra40/mptable.c
+++ b/src/mainboard/sunw/ultra40/mptable.c
@@ -34,7 +34,7 @@ extern unsigned sbdnb;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "SUNW ";
diff --git a/src/mainboard/supermicro/h8dme/irq_tables.c b/src/mainboard/supermicro/h8dme/irq_tables.c
index 4aaf1497f0..284abfe4db 100644
--- a/src/mainboard/supermicro/h8dme/irq_tables.c
+++ b/src/mainboard/supermicro/h8dme/irq_tables.c
@@ -75,7 +75,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c
index 64ffbb71a2..784a639802 100644
--- a/src/mainboard/supermicro/h8dme/mptable.c
+++ b/src/mainboard/supermicro/h8dme/mptable.c
@@ -35,7 +35,7 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "SUPERMIC";
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 3219cd25e8..fba3315541 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -270,11 +270,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: [");
- print_debug_hex32(sysinfo);
- print_debug(",");
- print_debug_hex32((unsigned long)sysinfo + sizeof(struct sys_info));
- print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_mb_resource_map();
diff --git a/src/mainboard/supermicro/h8dmr/irq_tables.c b/src/mainboard/supermicro/h8dmr/irq_tables.c
index 4aaf1497f0..284abfe4db 100644
--- a/src/mainboard/supermicro/h8dmr/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr/irq_tables.c
@@ -75,7 +75,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c
index 64ffbb71a2..784a639802 100644
--- a/src/mainboard/supermicro/h8dmr/mptable.c
+++ b/src/mainboard/supermicro/h8dmr/mptable.c
@@ -35,7 +35,7 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "SUPERMIC";
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 1de0dc43f8..432ff95637 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -203,7 +203,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_mb_resource_map();
diff --git a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
index e9bf8c46f7..3f767ebbb2 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be between 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
index 8a30fe65bf..2301d6f008 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "SUPERMIC";
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 98d9e9f45d..114e3c6fbe 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -205,9 +205,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
index 26fcb4ace1..209e568067 100644
--- a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be between 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index fa59c9f498..9f264bdaa0 100644
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -32,7 +32,7 @@
extern void get_bus_conf(void);
extern unsigned sbdn3;
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "SUPERMIC";
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index ae20cdd53c..8c56a49906 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -248,9 +248,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c
index aad8856272..14f0f59227 100644
--- a/src/mainboard/supermicro/x6dai_g/mptable.c
+++ b/src/mainboard/supermicro/x6dai_g/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c
index e168e37a2f..1ac210e2d2 100644
--- a/src/mainboard/supermicro/x6dai_g/reset.c
+++ b/src/mainboard/supermicro/x6dai_g/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -24,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_6300ESB_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c
index 2b5995bc0e..e3cdad31a1 100644
--- a/src/mainboard/supermicro/x6dhe_g/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/supermicro/x6dhe_g/reset.c b/src/mainboard/supermicro/x6dhe_g/reset.c
index 5364632346..1ac210e2d2 100644
--- a/src/mainboard/supermicro/x6dhe_g/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -24,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index 2b5995bc0e..e3cdad31a1 100644
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/supermicro/x6dhe_g2/reset.c b/src/mainboard/supermicro/x6dhe_g2/reset.c
index 5364632346..1ac210e2d2 100644
--- a/src/mainboard/supermicro/x6dhe_g2/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g2/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -24,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c
index fd80a52492..a51eef8870 100644
--- a/src/mainboard/supermicro/x6dhr_ig/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/supermicro/x6dhr_ig/reset.c b/src/mainboard/supermicro/x6dhr_ig/reset.c
index 5364632346..1ac210e2d2 100644
--- a/src/mainboard/supermicro/x6dhr_ig/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -24,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
index f71114446e..7e8c6d5c44 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/supermicro/x6dhr_ig2/reset.c b/src/mainboard/supermicro/x6dhr_ig2/reset.c
index 5364632346..1ac210e2d2 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include <reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
@@ -24,19 +25,3 @@ void hard_reset(void)
outb(0x02, 0xcf9);
outb(0x06, 0xcf9);
}
-void full_reset(void)
-{
- device_t dev;
- /* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801ER_LPC), 0);
- if (dev != PCI_DEV_INVALID) {
- unsigned byte;
- byte = pci_read_config8(dev, 0xa4);
- byte &= 0xfe;
- pci_write_config8(dev, 0xa4, byte);
-
- }
- outb(0x0e, 0xcf9);
-}
-
-
diff --git a/src/mainboard/technexion/tim5690/mptable.c b/src/mainboard/technexion/tim5690/mptable.c
index a918dac675..5e6d465b33 100644
--- a/src/mainboard/technexion/tim5690/mptable.c
+++ b/src/mainboard/technexion/tim5690/mptable.c
@@ -38,7 +38,7 @@ extern u32 sbdn_sb600;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "ATI ";
diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index 1546233bf0..a707affa47 100644
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -198,7 +198,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c
index d8ce32833d..8214ff0c2c 100644
--- a/src/mainboard/technexion/tim8690/mptable.c
+++ b/src/mainboard/technexion/tim8690/mptable.c
@@ -38,7 +38,7 @@ extern u32 sbdn_sb600;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "ATI ";
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index e3a98f78fa..d9ebaf6530 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -190,7 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
allow_all_aps_stop(bsp_apicid);
/* It's the time to set ctrl now; */
- printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
+ printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
diff --git a/src/mainboard/technologic/ts5300/mainboard.c b/src/mainboard/technologic/ts5300/mainboard.c
index a9b6185dd2..4b9ce16bf8 100644
--- a/src/mainboard/technologic/ts5300/mainboard.c
+++ b/src/mainboard/technologic/ts5300/mainboard.c
@@ -7,7 +7,8 @@
#include "chip.h"
-static void irqdump()
+#if 0
+static void irqdump(void)
{
volatile unsigned char *irq;
void *mmcr;
@@ -26,16 +27,16 @@ static void irqdump()
printk(BIOS_ERR, "mmcr is %p\n", mmcr);
for(i = 0; irqlist[i] >= 0; i++) {
irq = mmcr + irqlist[i];
- printk(BIOS_ERR, "0x%x register @%p is 0x%lx\n", irqlist[i], irq, *irq);
+ printk(BIOS_ERR, "0x%x register @%p is 0x%x\n", irqlist[i], irq, *irq);
}
}
+#endif
/* TODO: finish up mmcr struct in sc520.h, and;
- set ADDDECTL (now done in raminit.c in cpu/amd/sc520
*/
static void enable_dev(struct device *dev) {
- volatile struct mmcrpic *pic = MMCRPIC;
volatile struct mmcr *mmcr = MMCRDEFAULT;
/* currently, nothing in the device to use, so ignore it. */
diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index eb6b94aba2..22130dd1be 100644
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -4,7 +4,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c
index 93ca67545e..f7fb1f3c50 100644
--- a/src/mainboard/tyan/s2850/mptable.c
+++ b/src/mainboard/tyan/s2850/mptable.c
@@ -43,7 +43,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2875/mptable.c b/src/mainboard/tyan/s2875/mptable.c
index 5f0ac0a3ac..c6f109db5c 100644
--- a/src/mainboard/tyan/s2875/mptable.c
+++ b/src/mainboard/tyan/s2875/mptable.c
@@ -41,7 +41,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
return 0;
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c
index 6da67170b5..0921fdccfe 100644
--- a/src/mainboard/tyan/s2880/mptable.c
+++ b/src/mainboard/tyan/s2880/mptable.c
@@ -43,7 +43,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2881/irq_tables.c b/src/mainboard/tyan/s2881/irq_tables.c
index b61b269024..f41350eca7 100644
--- a/src/mainboard/tyan/s2881/irq_tables.c
+++ b/src/mainboard/tyan/s2881/irq_tables.c
@@ -58,7 +58,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c
index 06f6f5903c..c00bc3fedc 100644
--- a/src/mainboard/tyan/s2881/mptable.c
+++ b/src/mainboard/tyan/s2881/mptable.c
@@ -20,7 +20,7 @@ extern unsigned sbdn3;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2882/irq_tables.c b/src/mainboard/tyan/s2882/irq_tables.c
index b5c075e879..3107ac8a87 100644
--- a/src/mainboard/tyan/s2882/irq_tables.c
+++ b/src/mainboard/tyan/s2882/irq_tables.c
@@ -158,7 +158,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...\n", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...\n", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c
index f546693ffb..63d47f8372 100644
--- a/src/mainboard/tyan/s2882/mptable.c
+++ b/src/mainboard/tyan/s2882/mptable.c
@@ -43,7 +43,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
return 0;
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2885/irq_tables.c b/src/mainboard/tyan/s2885/irq_tables.c
index 590140e352..1f0a9fb883 100644
--- a/src/mainboard/tyan/s2885/irq_tables.c
+++ b/src/mainboard/tyan/s2885/irq_tables.c
@@ -61,7 +61,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index 952ba69d2a..a3e5155d5f 100644
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -24,7 +24,7 @@ extern unsigned sbdn5;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2891/irq_tables.c b/src/mainboard/tyan/s2891/irq_tables.c
index dc117f404b..2b1f640921 100644
--- a/src/mainboard/tyan/s2891/irq_tables.c
+++ b/src/mainboard/tyan/s2891/irq_tables.c
@@ -67,7 +67,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2891/mptable.c b/src/mainboard/tyan/s2891/mptable.c
index 0e15df6f81..d4dc7bcf88 100644
--- a/src/mainboard/tyan/s2891/mptable.c
+++ b/src/mainboard/tyan/s2891/mptable.c
@@ -24,7 +24,7 @@ extern unsigned sbdn3;
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2912/irq_tables.c b/src/mainboard/tyan/s2912/irq_tables.c
index 6c59500ff5..15c6f43452 100644
--- a/src/mainboard/tyan/s2912/irq_tables.c
+++ b/src/mainboard/tyan/s2912/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2912/mptable.c b/src/mainboard/tyan/s2912/mptable.c
index aa9a7c6703..bdd029f7aa 100644
--- a/src/mainboard/tyan/s2912/mptable.c
+++ b/src/mainboard/tyan/s2912/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 2fdff068e8..88e759db1b 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -214,7 +214,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
early_usbdebug_direct_init();
#endif
console_init();
- print_debug("*sysinfo range: ["); print_debug_hex32(sysinfo); print_debug(","); print_debug_hex32((unsigned long)sysinfo+sizeof(struct sys_info)); print_debug(")\r\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
diff --git a/src/mainboard/tyan/s2912_fam10/irq_tables.c b/src/mainboard/tyan/s2912_fam10/irq_tables.c
index b3628b65c5..d888c836e4 100644
--- a/src/mainboard/tyan/s2912_fam10/irq_tables.c
+++ b/src/mainboard/tyan/s2912_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
diff --git a/src/mainboard/tyan/s2912_fam10/mptable.c b/src/mainboard/tyan/s2912_fam10/mptable.c
index 4bd6c124a9..1fe5bea1eb 100644
--- a/src/mainboard/tyan/s2912_fam10/mptable.c
+++ b/src/mainboard/tyan/s2912_fam10/mptable.c
@@ -31,7 +31,7 @@
extern void get_bus_conf(void);
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index cee8c5952f..e75ef0780c 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -210,9 +210,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
- printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
printk(BIOS_DEBUG, "bsp_apicid = %02x\n", bsp_apicid);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08x\n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c
index 9a9eec7982..2d1e459579 100644
--- a/src/mainboard/tyan/s4880/mptable.c
+++ b/src/mainboard/tyan/s4880/mptable.c
@@ -41,7 +41,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
return 0;
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c
index 92d71e4774..6b13821f47 100644
--- a/src/mainboard/tyan/s4882/mptable.c
+++ b/src/mainboard/tyan/s4882/mptable.c
@@ -42,7 +42,7 @@ static unsigned node_link_to_bus(unsigned node, unsigned link)
return 0;
}
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "TYAN ";
diff --git a/src/mainboard/via/epia-m/vgabios.c b/src/mainboard/via/epia-m/vgabios.c
index 3af59547a8..7561382e60 100644
--- a/src/mainboard/via/epia-m/vgabios.c
+++ b/src/mainboard/via/epia-m/vgabios.c
@@ -371,7 +371,7 @@ void do_vgabios(void)
buf = (unsigned char *) 0xc0000;
if (buf[0]==0x55 && buf[1]==0xAA) {
busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
- printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
+ printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
@@ -567,14 +567,14 @@ int biosint(unsigned long intnumber,
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
- printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
+ printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
- printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
+ printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
@@ -602,8 +602,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
- printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n",
- intnumber);
+ printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c
index 6c26836596..e8040dc698 100644
--- a/src/mainboard/via/epia-n/mptable.c
+++ b/src/mainboard/via/epia-n/mptable.c
@@ -6,7 +6,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "LNXI ";
diff --git a/src/mainboard/via/pc2500e/mptable.c b/src/mainboard/via/pc2500e/mptable.c
index 16b4b5334d..e3f1fc15ea 100644
--- a/src/mainboard/via/pc2500e/mptable.c
+++ b/src/mainboard/via/pc2500e/mptable.c
@@ -32,7 +32,7 @@
#define bus_isa 2
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = "PCMP";
static const char oem[8] = "VIA ";
diff --git a/src/mainboard/via/vt8454c/mptable.c b/src/mainboard/via/vt8454c/mptable.c
index 9abbaf420c..7ac7813866 100644
--- a/src/mainboard/via/vt8454c/mptable.c
+++ b/src/mainboard/via/vt8454c/mptable.c
@@ -27,7 +27,7 @@
#include <string.h>
#include <stdint.h>
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
{
static const char sig[4] = MPC_SIGNATURE;
static const char oem[8] = "COREBOOT";
diff --git a/src/northbridge/amd/amdfam10/amdfam10_acpi.c b/src/northbridge/amd/amdfam10/amdfam10_acpi.c
index 0a35861556..bfc2307aa8 100644
--- a/src/northbridge/amd/amdfam10/amdfam10_acpi.c
+++ b/src/northbridge/amd/amdfam10/amdfam10_acpi.c
@@ -89,7 +89,7 @@ static void set_srat_mem(void *gp, struct device *dev, struct resource *res)
basek = resk(res->base);
sizek = resk(res->size);
- printk(BIOS_DEBUG, "set_srat_mem: dev %s, res->index=%04x startk=%08x, sizek=%08x\n",
+ printk(BIOS_DEBUG, "set_srat_mem: dev %s, res->index=%04lx startk=%08lx, sizek=%08lx\n",
dev_path(dev), res->index, basek, sizek);
/*
* 0-640K must be on node 0
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index 826b83ac0e..ca0a800f70 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -28,7 +28,7 @@ static void udelay_tsc(u32 us);
static void print_debug_addr(const char *str, void *val)
{
#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
- printk(BIOS_DEBUG, "------Address debug: %s%x------\n", str, val);
+ printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
#endif
}
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 543d74cbfd..765bd0b7c9 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1086,7 +1086,7 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
#if CONFIG_WRITE_HIGH_TABLES==1
- printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
+ printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (i==0 && high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 2ca14444cb..4cca32ac8a 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -1005,7 +1005,7 @@ static void amdk8_domain_set_resources(device_t dev)
#if CONFIG_GFXUMA == 1
- printk(BIOS_DEBUG, "node %d : uma_memory_base/1024=0x%08x, mmio_basek=0x%08x, basek=0x%08x, limitk=0x%08x\n", i, uma_memory_base >> 10, mmio_basek, basek, limitk);
+ printk(BIOS_DEBUG, "node %d : uma_memory_base/1024=0x%08llx, mmio_basek=0x%08lx, basek=0x%08x, limitk=0x%08x\n", i, uma_memory_base >> 10, mmio_basek, basek, limitk);
if ((uma_memory_base >> 10) < mmio_basek)
printk(BIOS_ALERT, "node %d: UMA memory starts below mmio_basek\n", i);
#else
diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index 89ccf907cb..55cdcaf703 100644
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -1700,7 +1700,7 @@ static unsigned int range_to_mtrr(unsigned int reg,
}
sizek = 1 << align;
#if CONFIG_MEM_TRAIN_SEQ != 1
- printk(BIOS_DEBUG, "Setting variable MTRR %d, base: %4dMB, range: %4dMB, type %s\r\n",
+ printk(BIOS_DEBUG, "Setting variable MTRR %d, base: %4ldMB, range: %4ldMB, type %s\r\n",
reg, range_startk >>10, sizek >> 10,
(type==MTRR_TYPE_UNCACHEABLE)?"UC":
((type==MTRR_TYPE_WRBACK)?"WB":"Other")
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 274277d7fc..3f9e89d63c 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -127,7 +127,7 @@ static void irq_init_steering(struct device *dev, uint16_t irq_map) {
/* Set up IRQ steering */
uint32_t pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C;
- printk(BIOS_DEBUG, "%s(%08X [%08X], %04X)\n", __func__, dev, pciAddr, irq_map);
+ printk(BIOS_DEBUG, "%s(%p [%08X], %04X)\n", __func__, dev, pciAddr, irq_map);
/* The IRQ steering values (in hex) are effectively dcba, where:
* <a> represents the IRQ for INTA,
@@ -240,7 +240,7 @@ setup_gx2(void)
/* calculate the PBASE and PMASK fields */
tmp2 = (SMM_OFFSET << 8) & 0xFFF00000; /* shift right 12 then left 20 == left 8 */
tmp2 |= (((~(SMM_SIZE * 1024) + 1) >> 12) & 0xfffff);
- printk(BIOS_DEBUG, "MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, tmp, tmp2);
+ printk(BIOS_DEBUG, "MSR 0x%x is now 0x%lx:0x%lx\n", 0x10000026, tmp, tmp2);
msr.hi = tmp;
msr.lo = tmp2;
wrmsr(0x10000026, msr);
diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c
index 491466577d..0c612319c8 100644
--- a/src/northbridge/amd/gx2/northbridgeinit.c
+++ b/src/northbridge/amd/gx2/northbridgeinit.c
@@ -112,10 +112,10 @@ writeglmsr(struct gliutable *gl){
msr.lo = gl->lo;
msr.hi = gl->hi;
wrmsr(gl->desc_name, msr); // MSR - see table above
- printk(BIOS_DEBUG, "%s: write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
/* they do this, so we do this */
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
@@ -164,7 +164,7 @@ SysmemInit(struct gliutable *gl)
msr.lo = sizebytes;
wrmsr(gl->desc_name, msr); // MSR - see table above
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__,
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__,
gl->desc_name, msr.hi, msr.lo);
}
@@ -181,7 +181,7 @@ DMMGL0Init(struct gliutable *gl) {
sizebytes -= DMM_SIZE*1024;
offset = sizebytes - DMM_OFFSET;
- printk(BIOS_DEBUG, "%s: offset is 0x%08x\n", __func__, offset);
+ printk(BIOS_DEBUG, "%s: offset is 0x%08lx\n", __func__, offset);
offset >>= 12;
msr.hi = (gl->hi) | (offset << 8);
/* I don't think this is needed */
@@ -192,7 +192,7 @@ DMMGL0Init(struct gliutable *gl) {
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
@@ -215,7 +215,7 @@ DMMGL1Init(struct gliutable *gl) {
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
SMMGL0Init(struct gliutable *gl) {
@@ -231,7 +231,7 @@ SMMGL0Init(struct gliutable *gl) {
printk(BIOS_DEBUG, "%s: %d bytes\n", __func__, sizebytes);
offset = sizebytes - SMM_OFFSET;
- printk(BIOS_DEBUG, "%s: offset is 0x%08x\n", __func__, offset);
+ printk(BIOS_DEBUG, "%s: offset is 0x%08lx\n", __func__, offset);
offset >>= 12;
msr.hi = offset << 8;
@@ -242,7 +242,7 @@ SMMGL0Init(struct gliutable *gl) {
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
SMMGL1Init(struct gliutable *gl) {
@@ -258,7 +258,7 @@ SMMGL1Init(struct gliutable *gl) {
wrmsr(gl->desc_name, msr); // MSR - See table above
msr = rdmsr(gl->desc_name);
- printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08x, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: AFTER write msr 0x%08lx, val 0x%08x:0x%08x\n", __func__, gl->desc_name, msr.hi, msr.lo);
}
static void
@@ -507,10 +507,10 @@ performance:
for(i = 0; gating->msrnum != 0xffffffff; i++) {
msr = rdmsr(gating->msrnum);
- printk(BIOS_DEBUG, "%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: MSR 0x%08lx is 0x%08x:0x%08x\n", __func__, gating->msrnum, msr.hi, msr.lo);
msr.hi |= gating->msr.hi;
msr.lo |= gating->msr.lo;
- printk(BIOS_DEBUG, "%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
+ printk(BIOS_DEBUG, "%s: MSR 0x%08lx will be set to 0x%08x:0x%08x\n", __func__,
gating->msrnum, msr.hi, msr.lo);
wrmsr(gating->msrnum, msr); // MSR - See the table above
gating +=1;
@@ -526,11 +526,11 @@ GeodeLinkPriority(void){
for(i = 0; prio->msrnum != 0xffffffff; i++) {
msr = rdmsr(prio->msrnum);
- printk(BIOS_DEBUG, "%s: MSR 0x%08x is 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "%s: MSR 0x%08lx is 0x%08x:0x%08x\n", __func__, prio->msrnum, msr.hi, msr.lo);
msr.hi |= prio->msr.hi;
msr.lo &= ~0xfff;
msr.lo |= prio->msr.lo;
- printk(BIOS_DEBUG, "%s: MSR 0x%08x will be set to 0x%08x:0x%08x\n", __func__,
+ printk(BIOS_DEBUG, "%s: MSR 0x%08lx will be set to 0x%08x:0x%08x\n", __func__,
prio->msrnum, msr.hi, msr.lo);
wrmsr(prio->msrnum, msr); // MSR - See the table above
prio +=1;
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 5c97649ce7..e7136dfdc9 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -341,7 +341,7 @@ void northbridge_set_resources(struct device *dev)
bus = &dev->link[link];
if (bus->children) {
printk(BIOS_DEBUG, "my_dev_set_resources: assign_resources %d\n",
- bus);
+ bus->secondary);
assign_resources(bus);
}
}
diff --git a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
index aff287cb56..d6400d5859 100644
--- a/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
+++ b/src/northbridge/intel/i3100/pciexp_porta_ep80579.c
@@ -56,7 +56,6 @@ static void pcie_init(struct device *dev)
static void pcie_bus_enable_resources(struct device *dev)
{
- u8 val8;
if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
printk(BIOS_SPEW, "Enable VGA IO/MEM forwarding on PCIe port\n");
pci_write_config8(dev, PCI_BRIDGE_CONTROL, 8);
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 23e7acffbd..952455a672 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -142,7 +142,7 @@ static void pci_domain_set_resources(device_t dev)
drp_value = drp_value >> 4; // >>= 4; //? mess with later
tomk += (unsigned long)(translate_i82810_to_mb[drp_value]);
- printk(BIOS_DEBUG, "Setting RAM size to %d MB\n", tomk);
+ printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk);
/* Convert tomk from MB to KB. */
tomk = tomk << 10;
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index 8587754fc1..03bf3a93b6 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -29,6 +29,7 @@
#include <string.h>
#include <bitops.h>
#include <cpu/x86/cache.h>
+#include <cpu/cpu.h>
#include "chip.h"
static void ram_resource(device_t dev, unsigned long index,
@@ -95,9 +96,7 @@ static void pci_domain_set_resources(device_t dev)
* too confusing to get right. Kilobytes are good up to
* 4 Terabytes of RAM...
*/
- uint16_t tolm_r, vga_mem;
unsigned long tomk, tolmk;
- unsigned long remapbasek, remaplimitk;
int idx;
/* Get the value of the highest DRB. This tells the end of
@@ -120,8 +119,8 @@ static void pci_domain_set_resources(device_t dev)
*/
/* Report the memory regions */
- printk(BIOS_DEBUG, "tomk = %d\n", tomk);
- printk(BIOS_DEBUG, "tolmk = %d\n", tolmk);
+ printk(BIOS_DEBUG, "tomk = %ld\n", tomk);
+ printk(BIOS_DEBUG, "tolmk = %ld\n", tolmk);
idx = 10;
/* avoid pam region */
@@ -165,8 +164,6 @@ static struct device_operations cpu_bus_ops = {
static void enable_dev(struct device *dev)
{
- struct device_path path;
-
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index cd6a2abed9..5aec00835f 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -244,7 +244,7 @@ static void cn400_domain_set_resources(device_t dev)
tomk = rambits * 32 * 1024;
/* Compute the Top Of Low Memory (TOLM), in Kb. */
tolmk = pci_tolm >> 10;
- printk(BIOS_SPEW, "tomk is 0x%x, tolmk is 0x%08X\n", tomk, tolmk);
+ printk(BIOS_SPEW, "tomk is 0x%lx, tolmk is 0x%08lX\n", tomk, tolmk);
if (tolmk >= tomk) {
/* The PCI hole does does not overlap the memory. */
tolmk = tomk;
diff --git a/src/northbridge/via/cn400/vgabios.c b/src/northbridge/via/cn400/vgabios.c
index 0b1cff7541..83ae77c4bb 100644
--- a/src/northbridge/via/cn400/vgabios.c
+++ b/src/northbridge/via/cn400/vgabios.c
@@ -371,7 +371,7 @@ void do_vgabios(void)
buf = (unsigned char *) 0xc0000;
if (buf[0]==0x55 && buf[1]==0xAA) {
busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
- printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
+ printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
@@ -567,14 +567,14 @@ int biosint(unsigned long intnumber,
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
- printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
+ printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
- printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
+ printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
@@ -602,8 +602,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
- printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n",
- intnumber);
+ printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index 2be45f7b83..ad8c42d841 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -177,7 +177,7 @@ static void pci_domain_set_resources(device_t dev)
}
tomk = rambits * 64 * 1024;
- printk(BIOS_SPEW, "tomk is 0x%x\n", tomk);
+ printk(BIOS_SPEW, "tomk is 0x%lx\n", tomk);
/* Compute the Top Of Low Memory (TOLM), in Kb. */
tolmk = pci_tolm >> 10;
if (tolmk >= tomk) {
diff --git a/src/northbridge/via/cn700/vgabios.c b/src/northbridge/via/cn700/vgabios.c
index 1b3a9f06f8..c9a6404f99 100644
--- a/src/northbridge/via/cn700/vgabios.c
+++ b/src/northbridge/via/cn700/vgabios.c
@@ -371,7 +371,7 @@ void do_vgabios(void)
buf = (unsigned char *) 0xc0000;
if (buf[0]==0x55 && buf[1]==0xAA) {
busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
- printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
+ printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
@@ -567,14 +567,14 @@ int biosint(unsigned long intnumber,
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
- printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
+ printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
- printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
+ printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
@@ -602,8 +602,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
- printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n",
- intnumber);
+ printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
diff --git a/src/northbridge/via/cx700/vgabios.c b/src/northbridge/via/cx700/vgabios.c
index 72b841f6f8..59b3239204 100644
--- a/src/northbridge/via/cx700/vgabios.c
+++ b/src/northbridge/via/cx700/vgabios.c
@@ -339,7 +339,7 @@ void do_vgabios(void)
if (buf[0] == 0x55 && buf[1] == 0xAA) {
busdevfn =
(dev->bus->secondary << 8) | dev->path.pci.devfn;
- printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
+ printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
@@ -517,14 +517,14 @@ int biosint(unsigned long intnumber,
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
- printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
+ printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
switch (intnumber) {
case 0 ... 15:
// These are not BIOS service, but the CPU-generated exceptions
- printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
+ printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
@@ -552,7 +552,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
- printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber);
+ printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index fd1c76e5ac..3144395180 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -48,7 +48,7 @@ static void northbridge_init(device_t dev)
*/
//fb = pci_read_config32(dev, 0x10); /* Base addres of framebuffer */
fb = 0xd0000000;
- printk(BIOS_DEBUG, "Frame buffer at %8x\n",fb);
+ printk(BIOS_DEBUG, "Frame buffer at %8lx\n",fb);
c = pci_read_config8(dev, 0xe1) & 0xf0; /* size of vga */
c |= fb>>28; /* upper nibble of frame buffer address */
diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c
index 9ec54da399..5533a4fda3 100644
--- a/src/northbridge/via/vx800/northbridge.c
+++ b/src/northbridge/via/vx800/northbridge.c
@@ -162,7 +162,7 @@ if register with invalid value we set frame buffer size to 32M for default, but
(((rambits << 6) - (4 << reg) -
VIACONFIG_TOP_SM_SIZE_MB) * 1024);
- printk(BIOS_SPEW, "tomk is 0x%x\n", tomk);
+ printk(BIOS_SPEW, "tomk is 0x%lx\n", tomk);
/* Compute the Top Of Low Memory, in Kb */
tolmk = pci_tolm >> 10;
if (tolmk >= tomk) {
diff --git a/src/northbridge/via/vx800/vgabios.c b/src/northbridge/via/vx800/vgabios.c
index 2a99b9c4c7..f8029ae157 100644
--- a/src/northbridge/via/vx800/vgabios.c
+++ b/src/northbridge/via/vx800/vgabios.c
@@ -338,7 +338,7 @@ void do_vgabios(void)
if (buf[0] == 0x55 && buf[1] == 0xAA) {
busdevfn =
(dev->bus->secondary << 8) | dev->path.pci.devfn;
- printk(BIOS_DEBUG, "bus/devfn = %#x\n", busdevfn);
+ printk(BIOS_DEBUG, "bus/devfn = %#lx\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
} else
printk(BIOS_DEBUG, "Failed to copy VGA BIOS to 0xc0000\n");
@@ -518,7 +518,7 @@ int biosint(unsigned long intnumber,
eax, ebx, ecx, edx);
printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
ebp, esp, edi, esi);
- printk(BIOS_DEBUG, "biosint: ip 0x%x cs 0x%x flags 0x%x\n",
+ printk(BIOS_DEBUG, "biosint: ip 0x%lx cs 0x%lx flags 0x%lx\n",
ip, cs, flags);
// cases in a good compiler are just as good as your own tables.
@@ -527,7 +527,7 @@ int biosint(unsigned long intnumber,
case 6: case 7: case 8: case 9: case 10:
case 11: case 12: case 13: case 14: case 15:
// These are not BIOS service, but the CPU-generated exceptions
- printk(BIOS_INFO, "biosint: Oops, exception %u\n", intnumber);
+ printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
if (esp < 0x1000) {
printk(BIOS_DEBUG, "Stack contents: ");
while (esp < 0x1000) {
@@ -556,7 +556,7 @@ int biosint(unsigned long intnumber,
&ebx, &edx, &ecx, &eax, &flags);
break;
default:
- printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%x\n", intnumber);
+ printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n", intnumber);
break;
}
if (ret)
diff --git a/src/southbridge/amd/rs780/rs780_pcie.c b/src/southbridge/amd/rs780/rs780_pcie.c
index 186266b8f1..5cea2fd650 100644
--- a/src/southbridge/amd/rs780/rs780_pcie.c
+++ b/src/southbridge/amd/rs780/rs780_pcie.c
@@ -255,7 +255,7 @@ void rs780_gpp_sb_init(device_t nb_dev, device_t dev, u32 port)
u32 gfx_gpp_sb_sel;
struct southbridge_amd_rs780_config *cfg =
(struct southbridge_amd_rs780_config *)nb_dev->chip_info;
- printk(BIOS_DEBUG, "gpp_sb_init nb_dev=0x%p, dev=0x%p, port=0x%p\n", nb_dev, dev, port);
+ printk(BIOS_DEBUG, "gpp_sb_init nb_dev=0x%x, dev=0x%x, port=0x%x\n", nb_dev->path.pci.devfn, dev->path.pci.devfn, port);
gfx_gpp_sb_sel = port >= 4 && port <= 8 ?
PCIE_CORE_INDEX_GPPSB : /* 4,5,6,7,8 */
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
index 481d68c74f..136c03a88b 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
@@ -86,7 +86,7 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
if(!(res->flags & IORESOURCE_IO)) continue;
base = res->base;
end = resource_end(res);
- printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08x, end=0x%08x\r\n",dev_path(child),base, end);
+ printk(BIOS_DEBUG, "bcm5785lpc decode:%s, base=0x%08lx, end=0x%08lx\r\n",dev_path(child),base, end);
switch(base) {
case 0x60: //KBC
case 0x64:
diff --git a/src/southbridge/intel/i3100/i3100_lpc.c b/src/southbridge/intel/i3100/i3100_lpc.c
index 4612c916d2..d629e2f144 100644
--- a/src/southbridge/intel/i3100/i3100_lpc.c
+++ b/src/southbridge/intel/i3100/i3100_lpc.c
@@ -317,7 +317,7 @@ static void lpc_init(struct device *dev)
if (!res) {
return;
}
- *((u8 *)(res->base + 0x31ff)) |= (1 << 0);
+ *((u8 *)((u32)res->base + 0x31ff)) |= (1 << 0);
// TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode
// (register 0x10/0x11) while the old code used int 1 (register 0x12)
diff --git a/src/southbridge/intel/i3100/i3100_reset.c b/src/southbridge/intel/i3100/i3100_reset.c
index 3ac52decb6..3f35f5fb83 100644
--- a/src/southbridge/intel/i3100/i3100_reset.c
+++ b/src/southbridge/intel/i3100/i3100_reset.c
@@ -19,6 +19,7 @@
*/
#include <arch/io.h>
+#include <reset.h>
void hard_reset(void)
{
diff --git a/src/southbridge/intel/i82801ax/i82801ax_lpc.c b/src/southbridge/intel/i82801ax/i82801ax_lpc.c
index 3f0323bd0e..8fccdf0983 100644
--- a/src/southbridge/intel/i82801ax/i82801ax_lpc.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_lpc.c
@@ -74,7 +74,7 @@ typedef struct southbridge_intel_i82801ax_config config_t;
* specific IRQ values in your mainboards Config.lb.
*/
-void i82801ax_enable_apic(struct device *dev)
+static void i82801ax_enable_apic(struct device *dev)
{
uint32_t reg32;
volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000;
@@ -108,7 +108,7 @@ void i82801ax_enable_apic(struct device *dev)
*ioapic_data = 1; /* Use Processor System Bus to deliver interrupts. */
}
-void i82801ax_enable_serial_irqs(struct device *dev)
+static void i82801ax_enable_serial_irqs(struct device *dev)
{
/* Set packet length and toggle silent mode bit. */
pci_write_config8(dev, SERIRQ_CNTL,
@@ -220,7 +220,7 @@ static void gpio_init(device_t dev, uint16_t ich_model)
}
}
-void i82801ax_rtc_init(struct device *dev)
+static void i82801ax_rtc_init(struct device *dev)
{
uint8_t reg8;
uint32_t reg32;
@@ -240,7 +240,7 @@ void i82801ax_rtc_init(struct device *dev)
pci_write_config8(dev, RTC_CONF, 0x04);
}
-void i82801ax_lpc_route_dma(struct device *dev, uint8_t mask)
+static void i82801ax_lpc_route_dma(struct device *dev, uint8_t mask)
{
uint16_t reg16;
int i;
diff --git a/src/southbridge/intel/i82801ex/i82801ex_reset.c b/src/southbridge/intel/i82801ex/i82801ex_reset.c
index a1d92a7cc1..9936892efe 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_reset.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_reset.c
@@ -1,6 +1,7 @@
#include <arch/io.h>
+#include <reset.h>
-void i82801ex_hard_reset(void)
+void hard_reset(void)
{
/* Try rebooting through port 0xcf9 */
outb((0 <<3)|(1<<2)|(1<<1), 0xcf9);
diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c
index d90fede890..b2523ff436 100644
--- a/src/southbridge/intel/i82870/p64h2_ioapic.c
+++ b/src/southbridge/intel/i82870/p64h2_ioapic.c
@@ -62,7 +62,7 @@ static void p64h2_ioapic_init(device_t dev)
pIndexRegister = (volatile uint32_t*) memoryBase;
pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10);
- printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x MBAR = %x DataAddr = %x\n",
+ printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x MBAR = %p DataAddr = %p\n",
apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn),
PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister);
diff --git a/src/southbridge/nvidia/ck804/ck804_nic.c b/src/southbridge/nvidia/ck804/ck804_nic.c
index cb8015c16b..7678fb50fb 100644
--- a/src/southbridge/nvidia/ck804/ck804_nic.c
+++ b/src/southbridge/nvidia/ck804/ck804_nic.c
@@ -18,11 +18,11 @@ static void nic_init(struct device *dev)
int eeprom_valid = 0;
struct southbridge_nvidia_ck804_config *conf;
static uint32_t nic_index = 0;
- uint8_t *base;
+ unsigned long base;
struct resource *res;
res = find_resource(dev, 0x10);
- base = (uint8_t*)(unsigned long)res->base;
+ base = (unsigned long)res->base;
#define NvRegPhyInterface 0xC0
#define PHY_RGMII 0x10000000
@@ -76,8 +76,8 @@ static void nic_init(struct device *dev)
if (!eeprom_valid) {
unsigned long mac_pos;
mac_pos = 0xffffffd0; /* See romstrap.inc and romstrap.lds. */
- mac_l = read32((uint8_t*)mac_pos) + nic_index;
- mac_h = read32((uint8_t*)mac_pos + 4);
+ mac_l = read32(mac_pos) + nic_index;
+ mac_h = read32(mac_pos + 4);
}
#if 1
/* Set that into NIC MMIO. */
diff --git a/src/southbridge/nvidia/mcp55/mcp55_aza.c b/src/southbridge/nvidia/mcp55/mcp55_aza.c
index cea0b49e8c..d4b0e8f2fb 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_aza.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_aza.c
@@ -230,7 +230,7 @@ static void aza_init(struct device *dev)
return;
base =(uint8_t *) res->base;
- printk(BIOS_DEBUG, "base = %08x\n", base);
+ printk(BIOS_DEBUG, "base = %p\n", base);
codec_mask = codec_detect(base);
diff --git a/src/southbridge/nvidia/mcp55/mcp55_lpc.c b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
index 869e8392e2..84612890e9 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_lpc.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
@@ -80,7 +80,7 @@ static void enable_hpet(struct device *dev)
pci_write_config32(dev,0x44, 0xfed00001);
hpet_address=pci_read_config32(dev,0x44)& 0xfffffffe;
- printk(BIOS_DEBUG, "enabling HPET @0x%x\n", hpet_address);
+ printk(BIOS_DEBUG, "enabling HPET @0x%lx\n", hpet_address);
}
static void lpc_init(device_t dev)
@@ -224,7 +224,7 @@ static void mcp55_lpc_enable_childrens_resources(device_t dev)
if(!(res->flags & IORESOURCE_IO)) continue;
base = res->base;
end = resource_end(res);
- printk(BIOS_DEBUG, "mcp55 lpc decode:%s, base=0x%08x, end=0x%08x\n",dev_path(child),base, end);
+ printk(BIOS_DEBUG, "mcp55 lpc decode:%s, base=0x%08lx, end=0x%08lx\n",dev_path(child),base, end);
switch(base) {
case 0x3f8: // COM1
reg |= (1<<0); break;
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 5d669e78ae..a9fcac6ab0 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -189,7 +189,7 @@ void rl5c476_set_resources(device_t dev)
resource = find_resource(dev,1);
if( !(resource->flags & IORESOURCE_STORED) ){
resource->flags |= IORESOURCE_STORED ;
- printk(BIOS_DEBUG, "%s 1 ==> %x\n", dev_path(dev), resource->base);
+ printk(BIOS_DEBUG, "%s 1 ==> %llx\n", dev_path(dev), resource->base);
cf_base = resource->base;
}
}
diff --git a/src/southbridge/sis/sis966/sis966_aza.c b/src/southbridge/sis/sis966/sis966_aza.c
index 013f5895c1..8e8f8e0055 100644
--- a/src/southbridge/sis/sis966/sis966_aza.c
+++ b/src/southbridge/sis/sis966/sis966_aza.c
@@ -117,7 +117,7 @@ static int codec_detect(uint8_t *base)
return 0;
}
- printk(BIOS_DEBUG, "Codec ID = %lx\n", dword);
+ printk(BIOS_DEBUG, "Codec ID = %x\n", dword);
dword=0x1;
return dword;
@@ -293,7 +293,7 @@ static void aza_init(struct device *dev)
return;
base =(uint8_t *) res->base;
- printk(BIOS_DEBUG, "base = %08x\n", base);
+ printk(BIOS_DEBUG, "base = %p\n", base);
codec_mask = codec_detect(base);
diff --git a/src/southbridge/sis/sis966/sis966_early_smbus.c b/src/southbridge/sis/sis966/sis966_early_smbus.c
index 98b824f88a..0f40872a4d 100644
--- a/src/southbridge/sis/sis966/sis966_early_smbus.c
+++ b/src/southbridge/sis/sis966/sis966_early_smbus.c
@@ -484,7 +484,7 @@ void sis_init_stage2(void)
printk(BIOS_DEBUG, "Init NorthBridge sis761 -------->\n");
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0);
msr = rdmsr(0xC001001A);
- printk(BIOS_DEBUG, "Memory Top Bound %lx\n",msr.lo );
+ printk(BIOS_DEBUG, "Memory Top Bound %x\n",msr.lo );
temp16=(pci_read_config8(dev, 0x4C) & 0xE0) >> 5;
temp16=0x0001<<(temp16-1);
diff --git a/src/southbridge/sis/sis966/sis966_lpc.c b/src/southbridge/sis/sis966/sis966_lpc.c
index c23e628970..39f1996ff4 100644
--- a/src/southbridge/sis/sis966/sis966_lpc.c
+++ b/src/southbridge/sis/sis966/sis966_lpc.c
@@ -214,7 +214,7 @@ static void sis966_lpc_enable_childrens_resources(device_t dev)
if(!(res->flags & IORESOURCE_IO)) continue;
base = res->base;
end = resource_end(res);
- printk(BIOS_DEBUG, "sis966 lpc decode:%s, base=0x%08x, end=0x%08x\n",dev_path(child),base, end);
+ printk(BIOS_DEBUG, "sis966 lpc decode:%s, base=0x%08lx, end=0x%08lx\n",dev_path(child),base, end);
switch(base) {
case 0x3f8: // COM1
reg |= (1<<0); break;
diff --git a/src/southbridge/sis/sis966/sis966_nic.c b/src/southbridge/sis/sis966/sis966_nic.c
index 62017360e7..25853b03a4 100644
--- a/src/southbridge/sis/sis966/sis966_nic.c
+++ b/src/southbridge/sis/sis966/sis966_nic.c
@@ -274,7 +274,7 @@ static void nic_init(struct device *dev)
return;
}
base = res->base;
- printk(BIOS_DEBUG, "NIC base address %lx\n",base);
+ printk(BIOS_DEBUG, "NIC base address %x\n",base);
if(!(val=phy_detect(base,&PhyAddr)))
{
@@ -291,7 +291,7 @@ static void nic_init(struct device *dev)
// if that is valid we will use that
- printk(BIOS_DEBUG, "EEPROM contents %x \n",ReadEEprom( dev, base, 0LL));
+ printk(BIOS_DEBUG, "EEPROM contents %lx \n",ReadEEprom( dev, base, 0LL));
for(i=0;i<3;i++) {
//status = smbus_read_byte(dev_eeprom, i);
ulValue=ReadEEprom( dev, base, i+3L);
diff --git a/src/southbridge/sis/sis966/sis966_usb2.c b/src/southbridge/sis/sis966/sis966_usb2.c
index 437583d12f..c2e5b9950b 100644
--- a/src/southbridge/sis/sis966/sis966_usb2.c
+++ b/src/southbridge/sis/sis966/sis966_usb2.c
@@ -95,7 +95,7 @@ static void usb2_init(struct device *dev)
return;
base =(uint8_t *) res->base;
- printk(BIOS_DEBUG, "base = %08x\n", base);
+ printk(BIOS_DEBUG, "base = %p\n", base);
write32(base+0x20, 0x2);
//-----------------------------------------------------------
diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c
index 46e9689800..06b4f57596 100644
--- a/src/superio/via/vt1211/vt1211.c
+++ b/src/superio/via/vt1211/vt1211.c
@@ -148,7 +148,7 @@ void vt1211_pnp_set_resources(struct device *dev)
for(i = 0; i < dev->resources; i++) {
resource = &dev->resource[i];
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
- printk(BIOS_ERR, "ERROR: %s %02x %s size: 0x%010Lx not assigned\n",
+ printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n",
dev_path(dev), dev->resource->index,
resource_type(resource),
resource->size);
@@ -166,7 +166,7 @@ void vt1211_pnp_set_resources(struct device *dev)
pnp_set_irq(dev, resource->index, resource->base);
}
else {
- printk(BIOS_ERR, "ERROR: %s %02x unknown resource type\n",
+ printk(BIOS_ERR, "ERROR: %s %02lx unknown resource type\n",
dev_path(dev), resource->index);
return;
}