diff options
| -rw-r--r-- | src/northbridge/amd/agesa/family14/Kconfig | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/agesawrapper.c | 17 |
2 files changed, 2 insertions, 17 deletions
diff --git a/src/northbridge/amd/agesa/family14/Kconfig b/src/northbridge/amd/agesa/family14/Kconfig index fef4b0aecf..3e73e5a78e 100644 --- a/src/northbridge/amd/agesa/family14/Kconfig +++ b/src/northbridge/amd/agesa/family14/Kconfig @@ -37,6 +37,6 @@ config MMCONF_BASE_ADDRESS config MMCONF_BUS_NUMBER int - default 16 + default 64 endif # NORTHBRIDGE_AMD_AGESA_FAMILY14 diff --git a/src/northbridge/amd/agesa/family14/agesawrapper.c b/src/northbridge/amd/agesa/family14/agesawrapper.c index 70d8918dec..fecec93cd3 100644 --- a/src/northbridge/amd/agesa/family14/agesawrapper.c +++ b/src/northbridge/amd/agesa/family14/agesawrapper.c @@ -34,8 +34,6 @@ #define FILECODE UNASSIGNED_FILE_FILECODE -#define MMCONF_ENABLE 1 - /* Define AMD Ontario APPU SSID/SVID */ #define AMD_APU_SVID 0x1022 #define AMD_APU_SSID 0x1234 @@ -102,24 +100,11 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) PCI_ADDR PciAddress; AMD_CONFIG_PARAMS StdHeader; - UINT8 BusRangeVal = 0; - UINT8 BusNum; - UINT8 Index; - /* Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base Address MSR register. */ - - for (Index = 0; Index < 8; Index++) { - BusNum = CONFIG_MMCONF_BUS_NUMBER >> Index; - if (BusNum == 1) { - BusRangeVal = Index; - break; - } - } - - MsrReg = (CONFIG_MMCONF_BASE_ADDRESS | (UINT64) (BusRangeVal << 2) | MMCONF_ENABLE); + MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse(CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader); /* |