diff options
| -rw-r--r-- | src/soc/rockchip/rk3399/clock.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c index 944ca6f417..7e205d2ba4 100644 --- a/src/soc/rockchip/rk3399/clock.c +++ b/src/soc/rockchip/rk3399/clock.c @@ -356,11 +356,6 @@ static void rkclk_set_dpllssc(struct pll_div *dpll_cfg) { u32 divval; - /* - * TODO find the root cause why is the delay needed, otherwise sometimes - * hang somewhere with reboot tests. - */ - udelay(30); assert(dpll_cfg->refdiv && dpll_cfg->refdiv <= 6); /* |