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-rw-r--r--src/drivers/intel/fsp1_1/Kconfig4
-rw-r--r--src/drivers/uart/Kconfig2
-rw-r--r--src/mainboard/google/daisy/Kconfig2
-rw-r--r--src/mainboard/google/smaug/Kconfig2
4 files changed, 5 insertions, 5 deletions
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 17a5caf6cf..306e09be74 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -34,13 +34,13 @@ config HAVE_FSP_BIN
config CPU_MICROCODE_CBFS_LEN
hex "Microcode update region length in bytes"
- default 0
+ default 0x0
help
The length in bytes of the microcode update region.
config CPU_MICROCODE_CBFS_LOC
hex "Microcode update base address in CBFS"
- default 0
+ default 0x0
help
The location (base address) in CBFS that contains the microcode update
binary.
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig
index dafdff12de..518e7caada 100644
--- a/src/drivers/uart/Kconfig
+++ b/src/drivers/uart/Kconfig
@@ -69,7 +69,7 @@ config UART_USE_REFCLK_AS_INPUT_CLOCK
config UART_PCI_ADDR
hex "UART's PCI bus, device, function address"
- default 0
+ default 0x0
help
Specify zero if the UART is connected to another bus type.
For PCI based UARTs, build the value as:
diff --git a/src/mainboard/google/daisy/Kconfig b/src/mainboard/google/daisy/Kconfig
index cef3f6125e..29d6690c72 100644
--- a/src/mainboard/google/daisy/Kconfig
+++ b/src/mainboard/google/daisy/Kconfig
@@ -49,7 +49,7 @@ config DRAM_SIZE_MB
config EC_GOOGLE_CHROMEEC_I2C_BUS
hex
- default 4
+ default 0x4
config UART_FOR_CONSOLE
int
diff --git a/src/mainboard/google/smaug/Kconfig b/src/mainboard/google/smaug/Kconfig
index 15ff2b3fc4..665545325b 100644
--- a/src/mainboard/google/smaug/Kconfig
+++ b/src/mainboard/google/smaug/Kconfig
@@ -85,7 +85,7 @@ config DRIVER_TPM_I2C_ADDR
config EC_GOOGLE_CHROMEEC_I2C_BUS
hex
- default 1
+ default 0x1
config EC_GOOGLE_CHROMEEC_BOARDNAME
string