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-rw-r--r--src/mainboard/Makefile.romccboard.inc8
-rw-r--r--src/mainboard/advantech/pcm-5820/Makefile.inc2
-rw-r--r--src/mainboard/asi/mb_5blgp/Makefile.inc2
-rw-r--r--src/mainboard/asi/mb_5blmp/Makefile.inc2
-rw-r--r--src/mainboard/axus/tc320/Makefile.inc2
-rw-r--r--src/mainboard/bcom/Kconfig2
-rw-r--r--src/mainboard/bcom/winnet100/Makefile.inc2
-rw-r--r--src/mainboard/bcom/winnetp680/Kconfig36
-rw-r--r--src/mainboard/bcom/winnetp680/Makefile.inc61
-rw-r--r--src/mainboard/dell/s1850/Makefile.inc8
-rw-r--r--src/mainboard/eaglelion/5bcm/Makefile.inc2
-rw-r--r--src/mainboard/gigabyte/Kconfig1
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Kconfig148
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc57
-rw-r--r--src/mainboard/iei/juki-511p/Makefile.inc2
-rw-r--r--src/mainboard/iei/nova4899r/Makefile.inc2
-rw-r--r--src/mainboard/intel/jarrell/Makefile.inc2
-rw-r--r--src/mainboard/intel/mtarvon/Makefile.inc2
-rw-r--r--src/mainboard/intel/truxton/Makefile.inc2
-rw-r--r--src/mainboard/intel/xe7501devkit/Makefile.inc2
-rw-r--r--src/mainboard/jetway/Kconfig9
-rw-r--r--src/mainboard/jetway/j7f24/Kconfig43
-rw-r--r--src/mainboard/jetway/j7f24/Makefile.inc50
-rw-r--r--src/mainboard/newisys/Kconfig9
-rw-r--r--src/mainboard/newisys/khepri/Kconfig123
-rw-r--r--src/mainboard/newisys/khepri/Makefile.inc52
-rw-r--r--src/mainboard/nvidia/Kconfig9
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Kconfig148
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Makefile.inc59
-rw-r--r--src/mainboard/rca/Kconfig9
-rw-r--r--src/mainboard/rca/rm4100/Kconfig36
-rw-r--r--src/mainboard/rca/rm4100/Makefile.inc4
-rw-r--r--src/mainboard/televideo/tc7020/Makefile.inc2
33 files changed, 872 insertions, 26 deletions
diff --git a/src/mainboard/Makefile.romccboard.inc b/src/mainboard/Makefile.romccboard.inc
index cc26299e97..054a4f93df 100644
--- a/src/mainboard/Makefile.romccboard.inc
+++ b/src/mainboard/Makefile.romccboard.inc
@@ -51,17 +51,17 @@ obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
ifdef POST_EVALUATION
-ROMCCFLAGS ?= -mcpu=p2
+ROMCCFLAGS ?= -mcpu=p2 -O2
$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
- $(obj)/romcc $(ROMCCFLAGS) -O2 --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
else
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c
- $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
endif
endif
diff --git a/src/mainboard/advantech/pcm-5820/Makefile.inc b/src/mainboard/advantech/pcm-5820/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/advantech/pcm-5820/Makefile.inc
+++ b/src/mainboard/advantech/pcm-5820/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/asi/mb_5blgp/Makefile.inc b/src/mainboard/asi/mb_5blgp/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/asi/mb_5blgp/Makefile.inc
+++ b/src/mainboard/asi/mb_5blgp/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/asi/mb_5blmp/Makefile.inc b/src/mainboard/asi/mb_5blmp/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/asi/mb_5blmp/Makefile.inc
+++ b/src/mainboard/asi/mb_5blmp/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/axus/tc320/Makefile.inc b/src/mainboard/axus/tc320/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/axus/tc320/Makefile.inc
+++ b/src/mainboard/axus/tc320/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/bcom/Kconfig b/src/mainboard/bcom/Kconfig
index 3575d24ee1..04ed721e29 100644
--- a/src/mainboard/bcom/Kconfig
+++ b/src/mainboard/bcom/Kconfig
@@ -23,7 +23,7 @@ choice
depends on VENDOR_BCOM
source "src/mainboard/bcom/winnet100/Kconfig"
-# source "src/mainboard/bcom/winnetp680/Kconfig"
+source "src/mainboard/bcom/winnetp680/Kconfig"
endchoice
diff --git a/src/mainboard/bcom/winnet100/Makefile.inc b/src/mainboard/bcom/winnet100/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/bcom/winnet100/Makefile.inc
+++ b/src/mainboard/bcom/winnet100/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/bcom/winnetp680/Kconfig b/src/mainboard/bcom/winnetp680/Kconfig
new file mode 100644
index 0000000000..52c41620f9
--- /dev/null
+++ b/src/mainboard/bcom/winnetp680/Kconfig
@@ -0,0 +1,36 @@
+config BOARD_BCOM_WINNETP680
+ bool "WinNET P680"
+ select ARCH_X86
+ select CPU_VIA_C7
+ select NORTHBRIDGE_VIA_CN700
+ select SOUTHBRIDGE_VIA_VT8237R
+ select SUPERIO_WINBOND_W83697HF
+ select HAVE_PIRQ_TABLE
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+
+config MAINBOARD_DIR
+ string
+ default bcom/winnetp680
+ depends on BOARD_BCOM_WINNETP680
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "WinNET P680"
+ depends on BOARD_BCOM_WINNETP680
+
+config IRQ_SLOT_COUNT
+ int
+ default 10
+ depends on BOARD_BCOM_WINNETP680
+
+config VIDEO_MB
+ int
+ default 32
+ depends on BOARD_BCOM_WINNETP680
+
+config RAMBASE
+ hex
+ default 0x4000
+ depends on BOARD_BCOM_WINNETP680
+
diff --git a/src/mainboard/bcom/winnetp680/Makefile.inc b/src/mainboard/bcom/winnetp680/Makefile.inc
new file mode 100644
index 0000000000..eb24017e8e
--- /dev/null
+++ b/src/mainboard/bcom/winnetp680/Makefile.inc
@@ -0,0 +1,61 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 VIA Technologies, Inc.
+## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+initobj-y += crt0.o
+obj-y += mainboard.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+
+obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
+crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
+crt0-y += auto.inc
+crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/dell/s1850/Makefile.inc b/src/mainboard/dell/s1850/Makefile.inc
index 683a297807..b2abbbb830 100644
--- a/src/mainboard/dell/s1850/Makefile.inc
+++ b/src/mainboard/dell/s1850/Makefile.inc
@@ -46,17 +46,17 @@ obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
ifdef POST_EVALUATION
-ROMCCFLAGS ?= -mcpu=p4
+ROMCCFLAGS ?= -mcpu=p4 -O2
$(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib/failover.c
- $(obj)/romcc $(ROMCCFLAGS) -O2 --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
else
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c
- $(obj)/romcc $(ROMCCFLAGS) -O2 $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
endif
endif
diff --git a/src/mainboard/eaglelion/5bcm/Makefile.inc b/src/mainboard/eaglelion/5bcm/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/eaglelion/5bcm/Makefile.inc
+++ b/src/mainboard/eaglelion/5bcm/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/gigabyte/Kconfig b/src/mainboard/gigabyte/Kconfig
index 847460db94..483e3fc8a6 100644
--- a/src/mainboard/gigabyte/Kconfig
+++ b/src/mainboard/gigabyte/Kconfig
@@ -22,6 +22,7 @@ choice
prompt "Mainboard model"
depends on VENDOR_GIGABYTE
+source "src/mainboard/gigabyte/ga_2761gxdk/Kconfig"
source "src/mainboard/gigabyte/ga-6bxc/Kconfig"
source "src/mainboard/gigabyte/m57sli/Kconfig"
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
new file mode 100644
index 0000000000..a0f601bb0a
--- /dev/null
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
@@ -0,0 +1,148 @@
+config BOARD_GIGABYTE_GA_2761GXDK
+ bool "GA-2761GXDK"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_AM2
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_SIS_SIS966
+ select SUPERIO_ITE_IT8716F
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select K8_REV_F_SUPPORT
+
+config MAINBOARD_DIR
+ string
+ default gigabyte/ga_2761gxdk
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "ga2761gxdk"
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
+ depends on BOARD_GIGABYTE_GA_2761GXDK
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_GIGABYTE_GA_2761GXDK
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
new file mode 100644
index 0000000000..8b29eba388
--- /dev/null
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
@@ -0,0 +1,57 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/sis/sis966/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/sis/sis966/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
diff --git a/src/mainboard/iei/juki-511p/Makefile.inc b/src/mainboard/iei/juki-511p/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/iei/juki-511p/Makefile.inc
+++ b/src/mainboard/iei/juki-511p/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/iei/nova4899r/Makefile.inc b/src/mainboard/iei/nova4899r/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/iei/nova4899r/Makefile.inc
+++ b/src/mainboard/iei/nova4899r/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/intel/jarrell/Makefile.inc b/src/mainboard/intel/jarrell/Makefile.inc
index 7d098f978d..e74807fd22 100644
--- a/src/mainboard/intel/jarrell/Makefile.inc
+++ b/src/mainboard/intel/jarrell/Makefile.inc
@@ -1,4 +1,4 @@
obj-y += reset.o
-ROMCCFLAGS := -mcpu=p4
+ROMCCFLAGS := -mcpu=p4 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/intel/mtarvon/Makefile.inc b/src/mainboard/intel/mtarvon/Makefile.inc
index a6be734529..8e216dd277 100644
--- a/src/mainboard/intel/mtarvon/Makefile.inc
+++ b/src/mainboard/intel/mtarvon/Makefile.inc
@@ -1,3 +1,3 @@
-ROMCCFLAGS := -mcpu=p4
+ROMCCFLAGS := -mcpu=p4 -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/intel/truxton/Makefile.inc b/src/mainboard/intel/truxton/Makefile.inc
index 59c6b14fa7..4a5d4f7bb2 100644
--- a/src/mainboard/intel/truxton/Makefile.inc
+++ b/src/mainboard/intel/truxton/Makefile.inc
@@ -1,3 +1,3 @@
-ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi
+ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi -O2
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/intel/xe7501devkit/Makefile.inc b/src/mainboard/intel/xe7501devkit/Makefile.inc
index 9f89eea4a8..a40cb5a5ae 100644
--- a/src/mainboard/intel/xe7501devkit/Makefile.inc
+++ b/src/mainboard/intel/xe7501devkit/Makefile.inc
@@ -1,4 +1,4 @@
-ROMCCFLAGS := -mcpu=p4
+ROMCCFLAGS := -mcpu=p4 -O2
obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
include $(src)/mainboard/Makefile.romccboard.inc
diff --git a/src/mainboard/jetway/Kconfig b/src/mainboard/jetway/Kconfig
index 792d600548..4c92a6ab9e 100644
--- a/src/mainboard/jetway/Kconfig
+++ b/src/mainboard/jetway/Kconfig
@@ -1 +1,8 @@
-#
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_JETWAY
+
+source "src/mainboard/jetway/j7f24/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/jetway/j7f24/Kconfig b/src/mainboard/jetway/j7f24/Kconfig
new file mode 100644
index 0000000000..8492bc2cd9
--- /dev/null
+++ b/src/mainboard/jetway/j7f24/Kconfig
@@ -0,0 +1,43 @@
+config BOARD_JETWAY_J7F24
+ bool "J7F24"
+ select ARCH_X86
+ select CPU_VIA_C7
+ select NORTHBRIDGE_VIA_CN700
+ select SOUTHBRIDGE_VIA_VT8237R
+ select SUPERIO_FINTEK_F71805F
+ select HAVE_PIRQ_TABLE
+
+config MAINBOARD_DIR
+ string
+ default jetway/j7f24
+ depends on BOARD_JETWAY_J7F24
+
+#config DCACHE_RAM_BASE
+# hex
+# default 0xffef0000
+# depends on BOARD_JETWAY_J7F24
+#
+#config DCACHE_RAM_SIZE
+# hex
+# default 0x8000
+# depends on BOARD_JETWAY_J7F24
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "j7f24"
+ depends on BOARD_JETWAY_J7F24
+
+config VIDEO_MB
+ int
+ default 32
+ depends on BOARD_JETWAY_J7F24
+
+config RAMBASE
+ hex
+ default 0x4000
+ depends on BOARD_JETWAY_J7F24
+
+config IRQ_SLOT_COUNT
+ int
+ default 10
+ depends on BOARD_JETWAY_J7F24
diff --git a/src/mainboard/jetway/j7f24/Makefile.inc b/src/mainboard/jetway/j7f24/Makefile.inc
new file mode 100644
index 0000000000..2a637c8b0b
--- /dev/null
+++ b/src/mainboard/jetway/j7f24/Makefile.inc
@@ -0,0 +1,50 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 VIA Technologies, Inc.
+## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+initobj-y += crt0.o
+obj-y += mainboard.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc
+crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc
+crt0-y += auto.inc
+crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/newisys/Kconfig b/src/mainboard/newisys/Kconfig
index 792d600548..fd8f9176e1 100644
--- a/src/mainboard/newisys/Kconfig
+++ b/src/mainboard/newisys/Kconfig
@@ -1 +1,8 @@
-#
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_NEWISYS
+
+source "src/mainboard/newisys/khepri/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig
new file mode 100644
index 0000000000..312a85764c
--- /dev/null
+++ b/src/mainboard/newisys/khepri/Kconfig
@@ -0,0 +1,123 @@
+config BOARD_NEWISYS_KHEPRI
+ bool "Khepri"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+
+config MAINBOARD_DIR
+ string
+ default newisys/khepri
+ depends on BOARD_NEWISYS_KHEPRI
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcf000
+ depends on BOARD_NEWISYS_KHEPRI
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_NEWISYS_KHEPRI
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_NEWISYS_KHEPRI
+
+config HAVE_HARD_RESET
+ bool
+ default y
+ depends on BOARD_NEWISYS_KHEPRI
+
+config IOAPIC
+ bool
+ default y
+ depends on BOARD_NEWISYS_KHEPRI
+
+config K8_REV_F_SUPPORT
+ bool
+ default n
+ depends on BOARD_NEWISYS_KHEPRI
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_NEWISYS_KHEPRI
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_NEWISYS_KHEPRI
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_NEWISYS_KHEPRI
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_NEWISYS_KHEPRI
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "Khepri"
+ depends on BOARD_NEWISYS_KHEPRI
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_NEWISYS_KHEPRI
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_NEWISYS_KHEPRI
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_NEWISYS_KHEPRI
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_NEWISYS_KHEPRI
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_NEWISYS_KHEPRI
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_NEWISYS_KHEPRI
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_NEWISYS_KHEPRI
+
+config CONSOLE_VGA
+ bool
+ default y
+ depends on BOARD_NEWISYS_KHEPRI
+
+config PCI_ROM_RUN
+ bool
+ default y
+ depends on BOARD_NEWISYS_KHEPRI
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_NEWISYS_KHEPRI
diff --git a/src/mainboard/newisys/khepri/Makefile.inc b/src/mainboard/newisys/khepri/Makefile.inc
new file mode 100644
index 0000000000..86d71e152b
--- /dev/null
+++ b/src/mainboard/newisys/khepri/Makefile.inc
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/nvidia/Kconfig b/src/mainboard/nvidia/Kconfig
index 792d600548..54a0c0a99c 100644
--- a/src/mainboard/nvidia/Kconfig
+++ b/src/mainboard/nvidia/Kconfig
@@ -1 +1,8 @@
-#
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_NVIDIA
+
+source "src/mainboard/nvidia/l1_2pvv/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig
new file mode 100644
index 0000000000..a153993f09
--- /dev/null
+++ b/src/mainboard/nvidia/l1_2pvv/Kconfig
@@ -0,0 +1,148 @@
+config BOARD_NVIDIA_L1_2PVV
+ bool "L1 2PVV"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_F
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_WINBOND_W83627EHG
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select K8_REV_F_SUPPORT
+
+config MAINBOARD_DIR
+ string
+ default nvidia/l1_2pvv
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "l1_2pvv"
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
+ depends on BOARD_NVIDIA_L1_2PVV
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_NVIDIA_L1_2PVV
diff --git a/src/mainboard/nvidia/l1_2pvv/Makefile.inc b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
new file mode 100644
index 0000000000..56cbf31bf0
--- /dev/null
+++ b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
@@ -0,0 +1,59 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
diff --git a/src/mainboard/rca/Kconfig b/src/mainboard/rca/Kconfig
index 792d600548..e4e913559d 100644
--- a/src/mainboard/rca/Kconfig
+++ b/src/mainboard/rca/Kconfig
@@ -1 +1,8 @@
-#
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_RCA
+
+source "src/mainboard/rca/rm4100/Kconfig"
+
+endchoice
+
diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig
new file mode 100644
index 0000000000..4b7764ee23
--- /dev/null
+++ b/src/mainboard/rca/rm4100/Kconfig
@@ -0,0 +1,36 @@
+config BOARD_RCA_RM4100
+ bool "RM4100"
+ select ARCH_X86
+ select CPU_INTEL_SOCKET_PGA370
+ select NORTHBRIDGE_INTEL_I82830
+ select SOUTHBRIDGE_INTEL_I82801XX
+ select SUPERIO_SMSC_SMSCSUPERIO
+ select HAVE_PIRQ_TABLE
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+
+config MAINBOARD_DIR
+ string
+ default rca/rm4100
+ depends on BOARD_RCA_RM4100
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "RM4100"
+ depends on BOARD_RCA_RM4100
+
+config HAVE_OPTION_TABLE
+ bool
+ default n
+ depends on BOARD_RCA_RM4100
+
+config IRQ_SLOT_COUNT
+ int
+ default 7
+ depends on BOARD_RCA_RM4100
+
+config VIDEO_MB
+ int
+ default 0
+ depends on BOARD_RCA_RM4100
+
diff --git a/src/mainboard/rca/rm4100/Makefile.inc b/src/mainboard/rca/rm4100/Makefile.inc
new file mode 100644
index 0000000000..b94711e01e
--- /dev/null
+++ b/src/mainboard/rca/rm4100/Makefile.inc
@@ -0,0 +1,4 @@
+ROMCCFLAGS=-mcpu=p3 -O
+
+include $(src)/mainboard/Makefile.romccboard.inc
+
diff --git a/src/mainboard/televideo/tc7020/Makefile.inc b/src/mainboard/televideo/tc7020/Makefile.inc
index 800f7d4f14..1050e61f81 100644
--- a/src/mainboard/televideo/tc7020/Makefile.inc
+++ b/src/mainboard/televideo/tc7020/Makefile.inc
@@ -18,6 +18,6 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-ROMCCFLAGS := -mcpu=i386
+ROMCCFLAGS := -mcpu=i386 -O2
include $(src)/mainboard/Makefile.romccboard.inc