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-rw-r--r--src/soc/intel/common/block/gpio/gpio.c27
-rw-r--r--src/soc/intel/common/block/include/intelblocks/gpio.h6
2 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index 47e2817a47..3a0594cba1 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -62,6 +62,10 @@
((group) * sizeof(uint32_t)))
#define GPI_SMI_EN_OFFSET(comm, group) ((comm)->gpi_smi_en_reg_0 + \
((group) * sizeof(uint32_t)))
+#define GPI_IS_OFFSET(comm, group) ((comm)->gpi_int_sts_reg_0 + \
+ ((group) * sizeof(uint32_t)))
+#define GPI_IE_OFFSET(comm, group) ((comm)->gpi_int_en_reg_0 + \
+ ((group) * sizeof(uint32_t)))
static inline size_t relative_pad_in_comm(const struct pad_community *comm,
gpio_t gpio)
@@ -582,3 +586,26 @@ uint32_t __weak soc_gpio_pad_config_fixup(const struct pad_config *cfg,
{
return reg_val;
}
+
+void gpi_clear_int_cfg(void)
+{
+ int i, group, num_groups;
+ uint32_t sts_value;
+ size_t gpio_communities;
+ const struct pad_community *comm;
+
+ comm = soc_gpio_get_community(&gpio_communities);
+ for (i = 0; i < gpio_communities; i++, comm++) {
+ num_groups = comm->num_gpi_regs;
+ for (group = 0; group < num_groups; group++) {
+ /* Clear the enable register */
+ pcr_write32(comm->port, GPI_IE_OFFSET(comm, group), 0);
+
+ /* Read and clear the set status register bits*/
+ sts_value = pcr_read32(comm->port,
+ GPI_IS_OFFSET(comm, group));
+ pcr_write32(comm->port,
+ GPI_IS_OFFSET(comm, group), sts_value);
+ }
+ }
+}
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h
index 147f6897a8..417929329f 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h
@@ -209,5 +209,11 @@ uint8_t gpio_get_pad_portid(const gpio_t pad);
uint32_t soc_gpio_pad_config_fixup(const struct pad_config *cfg,
int dw_reg, uint32_t reg_val);
+/*
+ * Function to reset/clear the GPI Interrupt Enable & Status registers for
+ * all GPIO pad communities.
+ */
+void gpi_clear_int_cfg(void);
+
#endif
#endif /* _SOC_INTELBLOCKS_GPIO_H_ */