diff options
-rw-r--r-- | src/southbridge/amd/cimx_wrapper/sb800/late.c | 4 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb800/SATA.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/late.c b/src/southbridge/amd/cimx_wrapper/sb800/late.c index de1637a0c5..50eeb48e86 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/late.c +++ b/src/southbridge/amd/cimx_wrapper/sb800/late.c @@ -27,7 +27,7 @@ #include "lpc.h" /* lpc_read_resources */ #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ #include "cfg.h" /* sb800 Cimx configuration */ -#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */ +#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */ /*implement in mainboard.c*/ @@ -363,7 +363,7 @@ static void sb800_enable(device_t dev) /* Assign the ioapic ID the next available number after the processor core local APIC IDs */ setup_ioapic(ioapic_base, CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS); #elif (CONFIG_APIC_ID_OFFSET > 0) - /* Assign the ioapic ID the value 0. Processor APIC IDs follow. */ + /* Assign the ioapic ID the value 0. Processor APIC IDs follow. */ setup_ioapic(ioapic_base, 0); #else #error "The processor APIC IDs must be lifted to make room for the I/O APIC ID" diff --git a/src/vendorcode/amd/cimx/sb800/SATA.c b/src/vendorcode/amd/cimx/sb800/SATA.c index 5777d3adfe..1c0e7e695d 100644 --- a/src/vendorcode/amd/cimx/sb800/SATA.c +++ b/src/vendorcode/amd/cimx/sb800/SATA.c @@ -43,7 +43,7 @@ * *************************************************************************** * */ - + #include "SBPLATFORM.h" #include "cbtypes.h" @@ -317,7 +317,7 @@ sataInitBeforePciEnum ( } if ( ((pConfig->SataClass) == AHCI_MODE) || ((pConfig->SataClass) == IDE_TO_AHCI_MODE) || ((pConfig->SataClass) == AHCI_MODE_4394) || ((pConfig->SataClass) == IDE_TO_AHCI_MODE_4394) ) { - if ( pConfig->BuildParameters.SataAHCISsid != NULL ) { + if ( pConfig->BuildParameters.SataAHCISsid != NULL ) { ddTempVar = pConfig->BuildParameters.SataAHCISsid; } } |