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-rw-r--r--src/config/Config.lb5
-rw-r--r--src/devices/chip.c15
-rw-r--r--src/include/device/chip.h15
-rw-r--r--src/superio/NSC/pc97307/chip.h5
-rw-r--r--src/superio/NSC/pc97307/superio.c31
-rw-r--r--util/newconfig/config.g171
6 files changed, 157 insertions, 85 deletions
diff --git a/src/config/Config.lb b/src/config/Config.lb
index 9e780027b9..f896cb77a7 100644
--- a/src/config/Config.lb
+++ b/src/config/Config.lb
@@ -71,9 +71,9 @@ makerule linuxbios
end
makerule linuxbios.a
- depends "$(OBJECTS-1)"
+ depends "$(OBJECTS)"
action "rm -f linuxbios.a"
- action "ar cr linuxbios.a $(OBJECTS-1)"
+ action "ar cr linuxbios.a $(OBJECTS)"
end
#makerule crt0.S
@@ -152,6 +152,7 @@ makerule clean
action "rm -f TAGS tags"
action "rm -f docipl"
action "rm -f build_opt_tbl option_table.c crt0.S"
+ action "rm -f chip_*.c"
end
# do standard config files that the user need not specify
diff --git a/src/devices/chip.c b/src/devices/chip.c
new file mode 100644
index 0000000000..d25c92e0d7
--- /dev/null
+++ b/src/devices/chip.c
@@ -0,0 +1,15 @@
+/* chips are arbitrary chips (superio, southbridge, etc.)
+ * They have private structures that define chip resources and default
+ * settings. They have four externally visible functions for control.
+ * They have a generic component which applies to all chips for
+ * path, etc.
+ */
+
+#include <device/chip.h>
+
+void
+chip_configure(struct chip *root, enum chip_pass pass)
+{
+ while (root) {
+ }
+}
diff --git a/src/include/device/chip.h b/src/include/device/chip.h
index ea57ea4b5c..8de91a1129 100644
--- a/src/include/device/chip.h
+++ b/src/include/device/chip.h
@@ -22,6 +22,14 @@ struct lpt_ports {
irq; // irq
};
+enum chip_pass {
+ CHIP_PRE_CONSOLE,
+ CHIP_PRE_DEVICE_ENUMERATE,
+ CHIP_PRE_DEVICE_CONFIGURE,
+ CHIP_PRE_DEVICE_ENABLE,
+ CHIP_PRE_DEVICE_INITIALIZE,
+ CHIP_PRE_BOOT
+};
/* linkages from devices of a type (e.g. superio devices)
@@ -33,10 +41,7 @@ struct chip;
/* there is one of these for each TYPE of chip */
struct chip_control {
- void (*alloc)(struct chip *s);
- void (*pre_pci_init)(struct chip *s);
- void (*init)(struct chip *s);
- void (*finishup)(struct chip *s);
+ void (*enable)(struct chip *, enum chip_pass);
char *path; /* the default path. Can be overridden
* by commands in config
*/
@@ -54,3 +59,5 @@ struct chip {
void *chip_info; /* the dreaded "void *" */
};
+extern struct chip *root;
+extern void chip_configure(struct chip *, enum chip_pass);
diff --git a/src/superio/NSC/pc97307/chip.h b/src/superio/NSC/pc97307/chip.h
new file mode 100644
index 0000000000..d30b7cb26c
--- /dev/null
+++ b/src/superio/NSC/pc97307/chip.h
@@ -0,0 +1,5 @@
+
+struct superio_NSC_pc97307_config {
+ typedef struct com_ports com1;
+ typedef struct lpt_ports lpt;
+};
diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c
index 8dc2ca8661..00117d8f32 100644
--- a/src/superio/NSC/pc97307/superio.c
+++ b/src/superio/NSC/pc97307/superio.c
@@ -2,6 +2,7 @@
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <arch/io.h>
+#include <device/chip.h>
#ifndef PNP_INDEX_REG
#define PNP_INDEX_REG 0x15C
@@ -18,26 +19,28 @@
void pnp_output(char address, char data)
{
- outb(address, PNP_INDEX_REG);
- outb(data, PNP_DATA_REG);
+ outb(address, PNP_INDEX_REG);
+ outb(data, PNP_DATA_REG);
}
-void sio_enable(void)
+void sio_enable(struct chip *chip, enum chip_pass pass)
{
- /* Enable Super IO Chip */
- pnp_output(0x07, 6); /* LD 6 = UART1 */
- pnp_output(0x30, 0); /* Dectivate */
- pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
- pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
- pnp_output(0x30, 1); /* Activate */
+ switch (pass) {
+ case CHIP_PRE_CONSOLE:
+ /* Enable Super IO Chip */
+ pnp_output(0x07, 6); /* LD 6 = UART1 */
+ pnp_output(0x30, 0); /* Dectivate */
+ pnp_output(0x60, chip->control->defaultport >> 8); /* IO Base */
+ pnp_output(0x61, chip->control->defaultport & 0xFF); /* IO Base */
+ pnp_output(0x30, 1); /* Activate */
+ break;
+ default:
+ /* nothing yet */
+ }
}
-#if 0
struct superio_control superio_NSC_pc97307_control = {
- pre_pci_init: (void *)0,
- init: (void *)0,
- finishup: (void *)0,
+ enable: sio_enable,
defaultport: SIO_COM1_BASE,
name: "NSC 87307"
};
-#endif
diff --git a/util/newconfig/config.g b/util/newconfig/config.g
index c166e73fc4..3938fd8abe 100644
--- a/util/newconfig/config.g
+++ b/util/newconfig/config.g
@@ -3,7 +3,6 @@ import os
import re
import string
-debug = 0
warnings = 0
errors = 0
@@ -79,6 +78,31 @@ class stack:
partstack = stack()
dirstack = stack()
+class debug_info:
+ none = 0
+ gencode = 1
+ dumptree = 2
+ object = 3
+ dict = 4
+ statement = 5
+ dump = 6
+
+ def __init__(self, *level):
+ self.__level = level
+
+ def setdebug(self, *level):
+ self.__level = level
+
+ def level(self, level):
+ return level in self.__level
+
+ def info(self, level, str):
+ if level in self.__level:
+ print str
+
+global debug
+debug = debug_info(debug_info.none)
+
# -----------------------------------------------------------------------------
# Error Handling
# -----------------------------------------------------------------------------
@@ -155,11 +179,6 @@ def exitiferrors():
if (errors != 0):
sys.exit(1)
-def debug_print(level, str):
- global debug
- if (debug >= level):
- print str
-
# -----------------------------------------------------------------------------
# Main classes
# -----------------------------------------------------------------------------
@@ -250,7 +269,7 @@ class romimage:
else:
source = os.path.join(dirstack.tos(), base + suffix)
object = base + '.o'
- debug_print(1, "add object %s source %s" % (object_name, source))
+ debug.info(debug.object, "add object %s source %s" % (object_name, source))
l = getdict(dict, base)
if (l):
print "Warning, object/driver %s previously defined" % base
@@ -308,7 +327,7 @@ class romimage:
if (str != 0):
self.useinitincludes = 1
- debug_print(2, "ADDCRT0: %s -> %s" % (str, path))
+ debug.info(debug.object, "ADDCRT0: %s -> %s" % (str, path))
o = getdict(self.initincludes, path)
if (o):
print "Warning, init include for %s previously defined" % path
@@ -501,20 +520,20 @@ class option_value:
class partobj:
"""A configuration part"""
def __init__ (self, image, dir, parent, type, name):
- debug_print(1, "partobj dir %s parent %s type %s" %(dir,parent,type))
+ debug.info(debug.object, "partobj dir %s parent %s type %s" %(dir,parent,type))
self.image = image
self.children = 0
+ self.siblings = 0
self.initcode = []
self.registercode = []
# sibling is not a list.
- self.siblings = 0
self.type = type
self.objects = []
self.dir = dir
self.irq = 0
self.instance = image.newpartinstance()
self.flatten_name = flatten_name(type + "/" + name)
- debug_print(1, "INSTANCE %d" % self.instance)
+ debug.info(debug.object, "INSTANCE %d" % self.instance)
self.devfn = 0
self.private = 0
self.uses_options = {}
@@ -527,12 +546,12 @@ class partobj:
self.chipconfig = 0
if (parent):
- debug_print(1, "add to parent")
+ debug.info(debug.gencode, "add to parent")
self.parent = parent
# add current child as my sibling,
# me as the child.
if (parent.children):
- debug_print(1, "add %s (%d) as sibling" % (parent.children.dir, parent.children.instance))
+ debug.info(debug.gencode, "add %s (%d) as sibling" % (parent.children.dir, parent.children.instance))
self.siblings = parent.children
parent.children = self
else:
@@ -559,6 +578,10 @@ class partobj:
def gencode(self, file):
if (self.chipconfig):
+ debug.info(debug.gencode, "gencode: chipconfig(%d)" % self.instance)
+ file.write("#include \"%s/chip.h\"\n" % self.dir)
+ file.write("extern struct superio_control %s_control;\n" % \
+ self.flatten_name)
file.write("struct %s_config %s_config_%d" % (\
self.flatten_name ,\
self.flatten_name , \
@@ -578,8 +601,10 @@ class partobj:
file.write("/* %s %s */\n" % (self.type, self.dir))
#file.write(" .devfn = %d,\n" % self.devfn)
if (self.siblings):
+ debug.info(debug.gencode, "gencode: siblings(%d)" % self.siblings.instance)
file.write(" .next = &dev%d,\n" % self.siblings.instance)
if (self.children):
+ debug.info(debug.gencode, "gencode: children(%d)" % self.children.instance)
file.write(" .children = &dev%d,\n" % \
self.children.instance)
if (self.private):
@@ -622,14 +647,14 @@ class partobj:
def getdict(dict, name):
if name not in dict.keys():
- debug_print(1, "Undefined: %s" % name)
+ debug.info(debug.dict, "Undefined: %s" % name)
return 0
v = dict.get(name, 0)
- debug_print(1, "getdict %s returning %s" % (name, v))
+ debug.info(debug.dict, "getdict %s returning %s" % (name, v))
return v
def setdict(dict, name, value):
- debug_print(1, "setdict sets %s to %s" % (name, value))
+ debug.info(debug.dict, "setdict sets %s to %s" % (name, value))
dict[name] = value
# options.
@@ -860,7 +885,7 @@ def addldscript(path):
fullpath = treetop + '/src/' + path
else:
fullpath = curdir + '/' + path
- debug_print(1, "fullpath :%s: curdir :%s: path :%s:" % (fullpath, curdir, path))
+ debug.info(debug.statement, "fullpath :%s: curdir :%s: path :%s:" % (fullpath, curdir, path))
curimage.addldscript(fullpath)
def payload(path):
@@ -965,7 +990,7 @@ def dodir(path, file):
path = re.sub('^/*', '', path)
else:
fullpath = dirstack.tos()
- debug_print(1, "DODIR: path %s, fullpath %s" % (path, fullpath))
+ debug.info(debug.statement, "DODIR: path %s, fullpath %s" % (path, fullpath))
dirstack.push(os.path.join(fullpath, path))
doconfigfile(fullpath, path, file)
dirstack.pop()
@@ -1012,13 +1037,13 @@ def doconfigfile(path, confdir, file):
# MISC FUNCTIONS
#=============================================================================
def ternary(val, yes, no):
- debug_print(1, "ternary %s" % expr)
- debug_print(1, "expr %s a %d yes %d no %d"% (expr, a, yes, no))
+ debug.info(debug.statement, "ternary %s" % expr)
+ debug.info(debug.statement, "expr %s a %d yes %d no %d"% (expr, a, yes, no))
if (val == 0):
- debug_print("Ternary returns %d" % yes)
+ debug.info(debug.statement, "Ternary returns %d" % yes)
return yes
else:
- debug_print("Ternary returns %d" % no)
+ debug.info(debug.statement, "Ternary returns %d" % no)
return no
def tohex(name):
@@ -1427,9 +1452,13 @@ def writeimagemakefile(image):
for objrule, obj in image.getobjectrules().items():
obj_name = obj[0]
obj_source = obj[1]
- file.write("OBJECTS-1 += %s\n" % (obj_name))
+ file.write("OBJECTS += %s\n" % (obj_name))
file.write("SOURCES += %s\n" % (obj_source))
+ # for chip_target.c
+ file.write("OBJECTS += chip_%s.o\n" % target_name)
+ file.write("SOURCES += chip_%s.c\n" % target_name)
+
for driverrule, driver in image.getdriverrules().items():
obj_name = driver[0]
obj_source = driver[1]
@@ -1481,17 +1510,21 @@ def writeimagemakefile(image):
file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n")
#file.write("%s\n" % objrule[2])
+ # special rule for chips_target.c
+ file.write("chip_%s.o: chip_%s.c\n" % (target_name, target_name))
+ file.write("\t$(CC) -c $(CFLAGS) -o $@ $<\n")
+
# Print out the rules that will make cause the files
# generated by NLBConfig.py to be remade if any dependencies change.
file.write("\n# Remember the automatically generated files\n")
file.write("GENERATED:=\n")
- for genfile in [ 'Makefile',
+ for genfile in ['Makefile',
'nsuperio.c',
- 'chip.c',
+ 'chip_%s.c' % target_name,
'LinuxBIOSDoc.config' ]:
file.write("GENERATED += %s\n" % genfile)
- file.write("GENERATED += %s\n" % image.getincludefilename())
+ file.write("GENERATED += %s\n" % image.getincludefilename())
#file.write("\n# Remake Makefile (and the other files generated by\n")
#file.write("# NLBConfig.py) if any config dependencies change.\n")
@@ -1581,44 +1614,67 @@ def writeldoptions(image):
file.write("%s = %s;\n" % (i, getformated(i, image)))
file.close()
-def verifyparse(image):
- """Add any run-time checks to verify that parsing the configuration
- was successful"""
- if (image.newformat() and image.getinitfile() == ''):
- fatal("An init file must be specified")
-
def dumptree(part, lvl):
- debug_print(1, "DUMPTREE ME is")
+ debug.info(debug.dumptree, "DUMPTREE ME is")
part.dumpme(lvl)
# dump the siblings -- actually are there any? not sure
# siblings are:
- debug_print(1, "DUMPTREE SIBLINGS are")
+ debug.info(debug.dumptree, "DUMPTREE SIBLINGS are")
kid = part.siblings
while (kid):
kid.dumpme(lvl)
kid = kid.siblings
# dump the kids
- debug_print(1, "DUMPTREE KIDS are")
+ debug.info(debug.dumptree, "DUMPTREE KIDS are")
#for kid in part.children:
if (part.children):
dumptree(part.children, lvl+1)
- debug_print(1, "DONE DUMPTREE")
+ debug.info(debug.dumptree, "DONE DUMPTREE")
+
+def writecode(image):
+ filename = os.path.join(img_dir, "chips_%s.c" % target_name)
+ print "Creating", filename
+ file = open(filename, 'w+')
+ # gen all the forward references
+
+ i = 0
+ file.write("#include <device/chip.h>\n")
+ file.write("struct chip ")
+ while (i <= image.numparts()):
+ if (i):
+ file.write("cdev%d "% i)
+ else:
+ file.write("root ")
+ i = i + 1
+ file.write(";\n")
+ gencode(image.getroot(), file)
+ file.close()
def gencode(part, file):
- debug_print(1, "GENCODE ME is")
+ debug.info(debug.gencode, "GENCODE ME is")
part.gencode(file)
# dump the siblings -- actually are there any? not sure
- # dump the kids
- debug_print(1, "GENCODE SIBLINGS are")
+ debug.info(debug.gencode, "GENCODE SIBLINGS are")
kid = part.siblings
while (kid):
kid.gencode(file)
kid = kid.siblings
- debug_print(1, "GENCODE KIDS are")
- #for kid in part.children:
+ # now dump the children
+ debug.info(debug.gencode, "GENCODE KIDS are")
if (part.children):
gencode(part.children, file)
- debug_print(1, "DONE GENCODE")
+ kid = part.siblings
+ while (kid):
+ if (kid.children):
+ gencode(kid.children, file)
+ kid = kid.siblings
+ debug.info(debug.gencode, "DONE GENCODE")
+
+def verifyparse(image):
+ """Add any run-time checks to verify that parsing the configuration
+ was successful"""
+ if (image.newformat() and image.getinitfile() == ''):
+ fatal("An init file must be specified")
#=============================================================================
# MAIN PROGRAM
@@ -1646,42 +1702,27 @@ if __name__=='__main__':
alloptions = 1
for image_name, image in romimages.items():
- if (debug):
- debug_print(1, "DEVICE TREE:")
+ if (debug.level(debug.dumptree)):
+ debug.info(debug.dumptree, "DEVICE TREE:")
dumptree(image.getroot(), 0)
img_dir = image.gettargetdir()
if not os.path.isdir(img_dir):
print "Creating directory %s" % img_dir
os.makedirs(img_dir)
- filename = os.path.join(img_dir, "chips.c")
- print "Creating", filename
- file = open(filename, 'w+')
- # gen all the forward references
-
- i = 0
- file.write("struct chip ")
- while (i <= image.numparts()):
- if (i):
- file.write("cdev%d "% i)
- else:
- file.write("root ")
- i = i + 1
- file.write(";\n")
- gencode(image.getroot(), file)
- file.close()
# crt0 includes
- if (debug):
+ if (debug.level(debug.dump)):
for i in image.getinitincludes().keys():
- debug_print(1, "crt0include file %s" % i)
+ debug.info(debug.dump, "crt0include file %s" % i)
for i in image.getdriverrules().keys():
- debug_print(1, "driver file %s" % i)
+ debug.info(debug.dump, "driver file %s" % i)
for i in image.getldscripts():
- debug_print(1, "ldscript file %s" % i)
+ debug.info(debug.dump, "ldscript file %s" % i)
for i, m in image.getmakerules().items():
- debug_print(1, " makerule %s dep %s act %s" % (i, m.dependency, m.actions))
+ debug.info(debug.dump, " makerule %s dep %s act %s" % (i, m.dependency, m.actions))
+ writecode(image)
writeimagesettings(image)
writeinitincludes(image)
writeimagemakefile(image)