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-rw-r--r--src/drivers/i2c/designware/dw_i2c.h2
-rw-r--r--src/ec/google/chromeec/ec_commands.h2
-rw-r--r--src/include/rules.h9
-rw-r--r--src/lib/romstage_handoff.c2
-rw-r--r--src/soc/intel/braswell/memmap.c4
5 files changed, 10 insertions, 9 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h
index 45f305e3b2..e20a5d1d7e 100644
--- a/src/drivers/i2c/designware/dw_i2c.h
+++ b/src/drivers/i2c/designware/dw_i2c.h
@@ -17,7 +17,7 @@
/*
* Timing values are in units of clock period, with the clock speed
- * provided by the SOC in CONFIG_DRIVERS_I2C_DESIGNWARE_I2C_CLOCK_MHZ
+ * provided by the SOC in CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
* Automatic configuration is done based on requested speed, but the
* values may need tuned depending on the board and the number of
* devices present on the bus.
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index 241ec393c6..fb83d60443 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -1388,7 +1388,7 @@ enum ec_feature_code {
*/
EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
/*
- * Early Firmware Selection ver.2. Enabled by CONFIG_VBOOT_EFS2.
+ * Early Firmware Selection ver.2. Enabled by VBOOT_EFS2 config option.
* Note this is a RO feature. So, a query (EC_CMD_GET_FEATURES) should
* be sent to RO to be precise.
*/
diff --git a/src/include/rules.h b/src/include/rules.h
index d30b2b896a..6ebb37e804 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -63,10 +63,11 @@
/*
* NOTE: "verstage" code may either run as a separate stage or linked into the
- * bootblock/romstage, depending on the setting of CONFIG_SEPARATE_VERSTAGE. The
- * ENV_SEPARATE_VERSTAGE macro will only return true for "verstage" code when
- * CONFIG_SEPARATE_VERSTAGE=y, otherwise that code will have ENV_BOOTBLOCK or
- * ENV_ROMSTAGE set (depending on the CONFIG_VBOOT_STARTS_IN_... options).
+ * bootblock/romstage, depending on the setting of the VBOOT_SEPARATE_VERSTAGE
+ * kconfig option. The ENV_SEPARATE_VERSTAGE macro will only return true for
+ * "verstage" code when CONFIG(VBOOT_SEPARATE_VERSTAGE) is true, otherwise that
+ * code will have ENV_BOOTBLOCK or ENV_ROMSTAGE set (depending on the
+ * "VBOOT_STARTS_IN_"... kconfig options).
*/
#elif defined(__VERSTAGE__)
#define ENV_DECOMPRESSOR 0
diff --git a/src/lib/romstage_handoff.c b/src/lib/romstage_handoff.c
index b54619d8d8..0a7a822f7b 100644
--- a/src/lib/romstage_handoff.c
+++ b/src/lib/romstage_handoff.c
@@ -8,7 +8,7 @@
struct romstage_handoff {
/* Indicate if the current boot is an S3 resume. If
- * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is
+ * CONFIG_RELOCATABLE_RAMSTAGE is enabled the chipset code is
* responsible for initializing this variable. Otherwise, ramstage
* will be re-loaded from cbfs (which can be slower since it lives
* in flash). */
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 6cfce43a81..4a791ef181 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -27,11 +27,11 @@ void *cbmem_top_chipset(void)
/*
* +-------------------------+ Top of RAM (aligned)
* | System Management Mode |
- * | code and data | Length: CONFIG_TSEG_SIZE
+ * | code and data | Length: CONFIG_SMM_TSEG_SIZE
* | (TSEG) |
* +-------------------------+ SMM base (aligned)
* | |
- * | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
+ * | Chipset Reserved Memory | Length: Multiple of CONFIG_SMM_TSEG_SIZE
* | |
* +-------------------------+ top_of_ram (aligned)
* | |