diff options
| -rw-r--r-- | src/ec/acpi/ec.c | 2 | ||||
| -rw-r--r-- | src/ec/compal/ene932/ec.c | 5 | ||||
| -rw-r--r-- | src/ec/google/chromeec/ec.c | 4 | ||||
| -rw-r--r-- | src/ec/google/chromeec/ec_i2c.c | 2 | ||||
| -rw-r--r-- | src/ec/google/chromeec/ec_lpc.c | 5 | ||||
| -rw-r--r-- | src/ec/google/chromeec/ec_spi.c | 2 | ||||
| -rw-r--r-- | src/ec/quanta/ene_kb3940q/ec.c | 5 | ||||
| -rw-r--r-- | src/ec/quanta/it8518/ec.c | 4 | ||||
| -rw-r--r-- | src/ec/smsc/mec1308/ec.c | 4 |
9 files changed, 1 insertions, 32 deletions
diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index 61cad656eb..481622cf37 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -172,8 +172,6 @@ void ec_set_ports(u16 cmd_reg, u16 data_reg) #endif -#if !defined(__SMM__) && !defined(__PRE_RAM__) struct chip_operations ec_acpi_ops = { CHIP_NAME("ACPI Embedded Controller") }; -#endif diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index cfabd8d12a..5bade10ea9 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */ -#ifndef __PRE_RAM__ - #include <console/console.h> #include <device/device.h> #include <device/pnp.h> @@ -125,7 +123,6 @@ static u8 ec_io_read(u16 addr) } */ -#ifndef __SMM__ static void ene932_init(struct device *dev) { if (!dev->enabled) @@ -155,5 +152,3 @@ struct chip_operations ec_compal_ene932_ops = { CHIP_NAME("COMPAL ENE932 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 5a2630ecb0..ed53c61b81 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -719,8 +719,6 @@ retry: return cec_cmd.cmd_code; } -#ifndef __PRE_RAM__ - int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen, uint8_t *buffer, int len, int is_read) { @@ -1109,8 +1107,6 @@ int google_ec_running_ro(void) return (ec_image_type == EC_IMAGE_RO); } -#endif /* ! __PRE_RAM__ */ - /** * Check if EC/TCPM is in an alternate mode or not. * diff --git a/src/ec/google/chromeec/ec_i2c.c b/src/ec/google/chromeec/ec_i2c.c index c3e1968c95..dc012fcd9e 100644 --- a/src/ec/google/chromeec/ec_i2c.c +++ b/src/ec/google/chromeec/ec_i2c.c @@ -252,10 +252,8 @@ int google_chromeec_command(struct chromeec_command *cec_command) #endif /* CONFIG_EC_GOOGLE_CHROMEEC_I2C_PROTO3 */ -#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 7dae6a2e17..feea9dd483 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -415,8 +415,6 @@ int google_chromeec_command(struct chromeec_command *cec_command) return -1; } -#ifndef __PRE_RAM__ -#ifndef __SMM__ static void lpc_ec_init(struct device *dev) { if (!dev->enabled) @@ -471,8 +469,6 @@ struct chip_operations ec_google_chromeec_ops = { .enable_dev = enable_dev, }; -#endif /* __SMM__ */ - static int google_chromeec_data_ready(u16 port) { return google_chromeec_status_check(port, EC_LPC_CMDR_DATA, @@ -502,4 +498,3 @@ u8 google_chromeec_get_event(void) /* Event (or 0 if none) is returned directly in the data byte */ return read_byte(EC_LPC_ADDR_ACPI_DATA); } -#endif diff --git a/src/ec/google/chromeec/ec_spi.c b/src/ec/google/chromeec/ec_spi.c index 3611814b66..c47d419647 100644 --- a/src/ec/google/chromeec/ec_spi.c +++ b/src/ec/google/chromeec/ec_spi.c @@ -115,10 +115,8 @@ int google_chromeec_command(struct chromeec_command *cec_command) return crosec_command_proto(cec_command, crosec_spi_io, &slave); } -#ifndef __PRE_RAM__ u8 google_chromeec_get_event(void) { printk(BIOS_ERR, "%s: Not supported.\n", __func__); return 0; } -#endif diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 1f8e36c661..4fc38da99d 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -14,8 +14,6 @@ * GNU General Public License for more details. */ -#ifndef __PRE_RAM__ - #include <arch/io.h> #include <console/console.h> #include <device/device.h> @@ -125,7 +123,6 @@ void ec_mem_write(u8 addr, u8 data) return; } -#ifndef __SMM__ static void ene_kb3940q_log_events(void) { #if CONFIG(ELOG) @@ -165,5 +162,3 @@ struct chip_operations ec_quanta_ene_kb3940q_ops = { CHIP_NAME("QUANTA EnE KB3940Q EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 5b9ba9f9bd..4853eb333f 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -124,7 +124,6 @@ void ec_write(u16 addr, u8 data) ec_write_ib(data); } -#ifndef __PRE_RAM__ u8 ec_it8518_get_event(void) { @@ -149,7 +148,6 @@ void ec_it8518_enable_wake_events(void) ec_write(EC_WAKE_SRC_ENABLE, reg8 | EC_LID_WAKE_ENABLE); } -#ifndef __SMM__ static void it8518_init(struct device *dev) { if (!dev->enabled) @@ -178,5 +176,3 @@ struct chip_operations ec_quanta_it8518_ops = { CHIP_NAME("QUANTA IT8518 EC") .enable_dev = enable_dev }; -#endif /* ! __SMM__ */ -#endif /* ! __PRE_RAM__ */ diff --git a/src/ec/smsc/mec1308/ec.c b/src/ec/smsc/mec1308/ec.c index 83dd729825..c6e282a015 100644 --- a/src/ec/smsc/mec1308/ec.c +++ b/src/ec/smsc/mec1308/ec.c @@ -115,10 +115,9 @@ void ec_set_ports(u16 cmd_reg, u16 data_reg) ec_data_reg = data_reg; } -#if !defined(__PRE_RAM__) && !defined(__SMM__) static void mec1308_enable(struct device *dev) { - struct ec_smsc_mec1308_config *conf = dev->chip_info; + DEVTREE_CONST struct ec_smsc_mec1308_config *conf = dev->chip_info; if (conf->mailbox_port) { ec_cmd_reg = conf->mailbox_port; @@ -130,4 +129,3 @@ struct chip_operations ec_smsc_mec1308_ops = { CHIP_NAME("SMSC MEC1308 EC Mailbox Interface") .enable_dev = mec1308_enable }; -#endif |