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-rw-r--r--src/cpu/intel/model_f0x/Kconfig8
-rw-r--r--src/cpu/intel/model_f0x/Makefile.inc3
-rw-r--r--src/cpu/intel/model_f0x/model_f0x_init.c51
-rw-r--r--src/cpu/intel/model_f1x/Kconfig8
-rw-r--r--src/cpu/intel/model_f1x/Makefile.inc3
-rw-r--r--src/cpu/intel/model_f1x/model_f1x_init.c51
-rw-r--r--src/cpu/intel/socket_mPGA603/Kconfig5
-rw-r--r--src/cpu/intel/socket_mPGA603/Makefile.inc10
8 files changed, 0 insertions, 139 deletions
diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig
deleted file mode 100644
index bfd8d3ae1e..0000000000
--- a/src/cpu/intel/model_f0x/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
-config CPU_INTEL_MODEL_F0X
- bool
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- select SMP
- select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f0x/Makefile.inc b/src/cpu/intel/model_f0x/Makefile.inc
deleted file mode 100644
index 158ac2110b..0000000000
--- a/src/cpu/intel/model_f0x/Makefile.inc
+++ /dev/null
@@ -1,3 +0,0 @@
-ramstage-y += model_f0x_init.c
-
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f0x/microcode.bin
diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c
deleted file mode 100644
index d942445dc0..0000000000
--- a/src/cpu/intel/model_f0x/model_f0x_init.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <string.h>
-#include <cpu/cpu.h>
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/lapic.h>
-#include <cpu/intel/microcode.h>
-#include <cpu/x86/cache.h>
-
-static void model_f0x_init(struct device *dev)
-{
- /* Turn on caching if we haven't already */
- x86_enable_cache();
- x86_setup_mtrrs();
- x86_mtrr_check();
-
- /* Update the microcode */
- intel_update_microcode_from_cbfs();
-
- /* Enable the local CPU APICs */
- setup_lapic();
-};
-
-static struct device_operations cpu_dev_ops = {
- .init = model_f0x_init,
-};
-
-static const struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_INTEL, 0x0f07 },
- { X86_VENDOR_INTEL, 0x0f0A },
- { 0, 0 },
-};
-
-static const struct cpu_driver driver __cpu_driver = {
- .ops = &cpu_dev_ops,
- .id_table = cpu_table,
-};
diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig
deleted file mode 100644
index cd4cdcfb60..0000000000
--- a/src/cpu/intel/model_f1x/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
-config CPU_INTEL_MODEL_F1X
- bool
- select ARCH_BOOTBLOCK_X86_32
- select ARCH_VERSTAGE_X86_32
- select ARCH_ROMSTAGE_X86_32
- select ARCH_RAMSTAGE_X86_32
- select SMP
- select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f1x/Makefile.inc b/src/cpu/intel/model_f1x/Makefile.inc
deleted file mode 100644
index 81bc161806..0000000000
--- a/src/cpu/intel/model_f1x/Makefile.inc
+++ /dev/null
@@ -1,3 +0,0 @@
-ramstage-y += model_f1x_init.c
-
-cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f1x/microcode.bin
diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c
deleted file mode 100644
index e0ef3fed28..0000000000
--- a/src/cpu/intel/model_f1x/model_f1x_init.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <string.h>
-#include <cpu/cpu.h>
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/msr.h>
-#include <cpu/x86/lapic.h>
-#include <cpu/intel/microcode.h>
-#include <cpu/x86/cache.h>
-
-static void model_f1x_init(struct device *dev)
-{
- /* Turn on caching if we haven't already */
- x86_enable_cache();
- x86_setup_mtrrs();
- x86_mtrr_check();
-
- /* Update the microcode */
- intel_update_microcode_from_cbfs();
-
- /* Enable the local CPU APICs */
- setup_lapic();
-};
-
-static struct device_operations cpu_dev_ops = {
- .init = model_f1x_init,
-};
-
-static const struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_INTEL, 0x0f12 },
- { X86_VENDOR_INTEL, 0x0f13 },
- { 0, 0 },
-};
-
-static const struct cpu_driver driver __cpu_driver = {
- .ops = &cpu_dev_ops,
- .id_table = cpu_table,
-};
diff --git a/src/cpu/intel/socket_mPGA603/Kconfig b/src/cpu/intel/socket_mPGA603/Kconfig
deleted file mode 100644
index 62e05f68c2..0000000000
--- a/src/cpu/intel/socket_mPGA603/Kconfig
+++ /dev/null
@@ -1,5 +0,0 @@
-config CPU_INTEL_SOCKET_MPGA603
- bool
- select CPU_INTEL_MODEL_F0X
- select CPU_INTEL_MODEL_F1X
- select CPU_INTEL_MODEL_F2X
diff --git a/src/cpu/intel/socket_mPGA603/Makefile.inc b/src/cpu/intel/socket_mPGA603/Makefile.inc
deleted file mode 100644
index d247f36bd4..0000000000
--- a/src/cpu/intel/socket_mPGA603/Makefile.inc
+++ /dev/null
@@ -1,10 +0,0 @@
-subdirs-y += ../model_f0x
-subdirs-y += ../model_f1x
-subdirs-y += ../model_f2x
-subdirs-y += ../../x86/tsc
-subdirs-y += ../../x86/mtrr
-subdirs-y += ../../x86/lapic
-subdirs-y += ../../x86/cache
-subdirs-y += ../../x86/smm
-subdirs-y += ../microcode
-subdirs-y += ../hyperthreading