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-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb12
1 files changed, 2 insertions, 10 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
index ea90e0b0ba..0c7c17fffe 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
@@ -10,8 +10,6 @@ chip soc/intel/skylake
register "gen1_dec" = "0x007c0a01" # Super IO SWC
register "gen2_dec" = "0x000c0ca1" # IPMI KCS
- register "gen3_dec" = "0x000c03e1" # UART3
- register "gen4_dec" = "0x000c02e1" # UART4
# PCIe configuration
register "PcieRpEnable[0]" = "1" # Enable PCH PCIe Port 1 / PCH SLOT4
@@ -103,14 +101,8 @@ chip soc/intel/skylake
end
device pnp 2e.5 off end # KBC
device pnp 2e.7 on end # GPIO
- device pnp 2e.b on # SUART3
- io 0x60 = 0x3e8
- irq 0x70 = 4
- end
- device pnp 2e.c on # SUART4
- io 0x60 = 0x2e8
- irq 0x70 = 3
- end
+ device pnp 2e.b off end # SUART3
+ device pnp 2e.c off end # SUART4
device pnp 2e.d on end # iLPC2AHB
device pnp 2e.e on # Mailbox
io 0x60 = 0xa40