diff options
| -rw-r--r-- | src/mainboard/artecgroup/dbe61/realmode/vgabios.c | 3 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/vgabios.c | 3 | ||||
| -rw-r--r-- | src/northbridge/via/cn400/vgabios.c | 3 | ||||
| -rw-r--r-- | src/northbridge/via/cn700/vgabios.c | 3 | ||||
| -rw-r--r-- | src/northbridge/via/cx700/vgabios.c | 3 | ||||
| -rw-r--r-- | src/northbridge/via/vx800/vgabios.c | 3 |
6 files changed, 12 insertions, 6 deletions
diff --git a/src/mainboard/artecgroup/dbe61/realmode/vgabios.c b/src/mainboard/artecgroup/dbe61/realmode/vgabios.c index ecf8c2a8e3..944e7c03e0 100644 --- a/src/mainboard/artecgroup/dbe61/realmode/vgabios.c +++ b/src/mainboard/artecgroup/dbe61/realmode/vgabios.c @@ -7,6 +7,7 @@ #include <arch/io.h> #include <string.h> #include "chip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -266,7 +267,7 @@ void do_vgabios(device_t dev) { unsigned long busdevfn; - unsigned int rom = dev->rom_address; + unsigned int rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); unsigned char *buf; unsigned int size = 64*1024; int i; diff --git a/src/mainboard/via/epia-m/vgabios.c b/src/mainboard/via/epia-m/vgabios.c index 94aa92b0fa..6954230d55 100644 --- a/src/mainboard/via/epia-m/vgabios.c +++ b/src/mainboard/via/epia-m/vgabios.c @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ void do_vgabios(void) /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfffc0000; + rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("rom base, size: %x\n", rom); diff --git a/src/northbridge/via/cn400/vgabios.c b/src/northbridge/via/cn400/vgabios.c index ab66937143..9620debe9b 100644 --- a/src/northbridge/via/cn400/vgabios.c +++ b/src/northbridge/via/cn400/vgabios.c @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ void do_vgabios(void) /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfff80000; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("VGA BIOS ROM base address: %x\n", rom); diff --git a/src/northbridge/via/cn700/vgabios.c b/src/northbridge/via/cn700/vgabios.c index c645af4992..82a2bab481 100644 --- a/src/northbridge/via/cn700/vgabios.c +++ b/src/northbridge/via/cn700/vgabios.c @@ -7,6 +7,7 @@ //#include <printk.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -356,7 +357,7 @@ void do_vgabios(void) /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xfff80000; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); printk_debug("rom base, size: %x\n", rom); diff --git a/src/northbridge/via/cx700/vgabios.c b/src/northbridge/via/cx700/vgabios.c index e7ba33ab3b..042d99e831 100644 --- a/src/northbridge/via/cx700/vgabios.c +++ b/src/northbridge/via/cx700/vgabios.c @@ -28,6 +28,7 @@ #undef __KERNEL__ #include <arch/io.h> #include <string.h> +#include <cbfs.h> void write_protect_vgabios(void); @@ -323,7 +324,7 @@ void do_vgabios(void) * of core LXB stuff */ #warning ROM address hardcoded to 512K - rom = 0xfff80000; + rom = (unsigned int)cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); printk_debug("rom base, size: %x\n", rom); diff --git a/src/northbridge/via/vx800/vgabios.c b/src/northbridge/via/vx800/vgabios.c index 85748ee004..b536b5825d 100644 --- a/src/northbridge/via/vx800/vgabios.c +++ b/src/northbridge/via/vx800/vgabios.c @@ -6,6 +6,7 @@ #include <arch/io.h> #include <string.h> #include "vgachip.h" +#include <cbfs.h> /* vgabios.c. Derived from: */ @@ -319,7 +320,7 @@ void do_vgabios(void) /* declare rom address here - keep any config data out of the way * of core LXB stuff */ - rom = 0xffffffff - CONFIG_ROM_SIZE + 1; + rom = cbfs_load_optionrom(dev->vendor, dev->device, 0); pci_write_config32(dev, PCI_ROM_ADDRESS, rom | 1); printk_debug("rom base: %x\n", rom); buf = (unsigned char *)rom; |