diff options
-rw-r--r-- | src/mainboard/via/vt8454c/Kconfig | 26 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl | 81 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/acpi/irq.asl | 138 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/acpi_tables.c | 41 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/board_info.txt | 1 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/cmos.layout | 43 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/devicetree.cb | 53 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/dsdt.asl | 335 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/fadt.c | 151 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/irq_tables.c | 56 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/mptable.c | 64 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/romstage.c | 104 |
13 files changed, 0 insertions, 1095 deletions
diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig deleted file mode 100644 index 408206c7f0..0000000000 --- a/src/mainboard/via/vt8454c/Kconfig +++ /dev/null @@ -1,26 +0,0 @@ -if BOARD_VIA_VT8454C - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_VIA_C7 - select NORTHBRIDGE_VIA_CX700 - select SUPERIO_VIA_VT1211 - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select HAVE_MP_TABLE - select HAVE_ACPI_TABLES - select BOARD_ROMSIZE_KB_512 - -config MAINBOARD_DIR - string - default via/vt8454c - -config MAINBOARD_PART_NUMBER - string - default "VT8454c" - -config IRQ_SLOT_COUNT - int - default 15 - -endif # BOARD_VIA_VT8454C diff --git a/src/mainboard/via/vt8454c/Kconfig.name b/src/mainboard/via/vt8454c/Kconfig.name deleted file mode 100644 index 998dbcb9db..0000000000 --- a/src/mainboard/via/vt8454c/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_VIA_VT8454C - bool "VT8454c" diff --git a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl b/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl deleted file mode 100644 index 5e95f90e43..0000000000 --- a/src/mainboard/via/vt8454c/acpi/irq-p2p-bridge.asl +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (PICM, Package () { - // _ADR PIN SRC IDX - - Package () { 0x0003FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0003FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0003FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0003FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0004FFFF, 0x00, LNKB, 0x00 }, - Package () { 0x0004FFFF, 0x01, LNKC, 0x00 }, - Package () { 0x0004FFFF, 0x02, LNKD, 0x00 }, - Package () { 0x0004FFFF, 0x03, LNKA, 0x00 }, - - Package () { 0x0005FFFF, 0x00, LNKC, 0x00 }, - Package () { 0x0005FFFF, 0x01, LNKD, 0x00 }, - Package () { 0x0005FFFF, 0x02, LNKA, 0x00 }, - Package () { 0x0005FFFF, 0x03, LNKB, 0x00 }, - - Package () { 0x0006FFFF, 0x00, LNKD, 0x00 }, - Package () { 0x0006FFFF, 0x01, LNKA, 0x00 }, - Package () { 0x0006FFFF, 0x02, LNKB, 0x00 }, - Package () { 0x0006FFFF, 0x03, LNKC, 0x00 }, - - Package () { 0x0007FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0007FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0007FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0007FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, - Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, - Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, - Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, -}) - -Name (APIC, Package () { - Package () { 0x0003FFFF, 0x00, 0x00, 0x10 }, - Package () { 0x0003FFFF, 0x01, 0x00, 0x11 }, - Package () { 0x0003FFFF, 0x02, 0x00, 0x12 }, - Package () { 0x0003FFFF, 0x03, 0x00, 0x13 }, - - Package () { 0x0004FFFF, 0x00, 0x00, 0x11 }, - Package () { 0x0004FFFF, 0x01, 0x00, 0x12 }, - Package () { 0x0004FFFF, 0x02, 0x00, 0x13 }, - Package () { 0x0004FFFF, 0x03, 0x00, 0x10 }, - - Package () { 0x0005FFFF, 0x00, 0x00, 0x12 }, - Package () { 0x0005FFFF, 0x01, 0x00, 0x13 }, - Package () { 0x0005FFFF, 0x02, 0x00, 0x10 }, - Package () { 0x0005FFFF, 0x03, 0x00, 0x11 }, - - Package () { 0x0006FFFF, 0x00, 0x00, 0x13 }, - Package () { 0x0006FFFF, 0x01, 0x00, 0x10 }, - Package () { 0x0006FFFF, 0x02, 0x00, 0x11 }, - Package () { 0x0006FFFF, 0x03, 0x00, 0x12 }, - - Package () { 0x0007FFFF, 0x00, 0x00, 0x10 }, - Package () { 0x0007FFFF, 0x01, 0x00, 0x11 }, - Package () { 0x0007FFFF, 0x02, 0x00, 0x12 }, - Package () { 0x0007FFFF, 0x03, 0x00, 0x13 }, - - Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, - Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, - Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, - Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, -}) diff --git a/src/mainboard/via/vt8454c/acpi/irq.asl b/src/mainboard/via/vt8454c/acpi/irq.asl deleted file mode 100644 index 3d07c81435..0000000000 --- a/src/mainboard/via/vt8454c/acpi/irq.asl +++ /dev/null @@ -1,138 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (PICM, Package () { - // _ADR PIN SRC IDX - - Package () { 0x0001FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0001FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0001FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0008FFFF, 0x00, LNKB, 0x00 }, - Package () { 0x0008FFFF, 0x01, LNKC, 0x00 }, - Package () { 0x0008FFFF, 0x02, LNKD, 0x00 }, - Package () { 0x0008FFFF, 0x03, LNKA, 0x00 }, - - Package () { 0x0009FFFF, 0x00, LNKC, 0x00 }, - Package () { 0x0009FFFF, 0x01, LNKD, 0x00 }, - Package () { 0x0009FFFF, 0x02, LNKA, 0x00 }, - Package () { 0x0009FFFF, 0x03, LNKB, 0x00 }, - - Package () { 0x000AFFFF, 0x00, LNKD, 0x00 }, - Package () { 0x000AFFFF, 0x01, LNKA, 0x00 }, - Package () { 0x000AFFFF, 0x02, LNKB, 0x00 }, - Package () { 0x000AFFFF, 0x03, LNKC, 0x00 }, - - Package () { 0x000BFFFF, 0x00, LNKD, 0x00 }, - Package () { 0x000BFFFF, 0x01, LNKA, 0x00 }, - Package () { 0x000BFFFF, 0x02, LNKB, 0x00 }, - Package () { 0x000BFFFF, 0x03, LNKC, 0x00 }, - - Package () { 0x000CFFFF, 0x00, LNKA, 0x00 }, - Package () { 0x000CFFFF, 0x01, LNKB, 0x00 }, - Package () { 0x000CFFFF, 0x02, LNKC, 0x00 }, - Package () { 0x000CFFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x000DFFFF, 0x00, LNKA, 0x00 }, - Package () { 0x000DFFFF, 0x01, LNKB, 0x00 }, - Package () { 0x000DFFFF, 0x02, LNKC, 0x00 }, - Package () { 0x000DFFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, - Package () { 0x000FFFFF, 0x01, LNKB, 0x00 }, - Package () { 0x000FFFFF, 0x02, LNKC, 0x00 }, - Package () { 0x000FFFFF, 0x03, LNKD, 0x00 }, - - /* USB controller */ - Package () { 0x0010FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0010FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0010FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0010FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0012FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0012FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0012FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0012FFFF, 0x03, LNKD, 0x00 } -}) - -Name (APIC, Package () { - Package () { 0x0001FFFF, 0x00, 0x00, 0x10 }, - Package () { 0x0001FFFF, 0x01, 0x00, 0x11 }, - Package () { 0x0001FFFF, 0x02, 0x00, 0x12 }, - Package () { 0x0001FFFF, 0x03, 0x00, 0x13 }, - - Package () { 0x0008FFFF, 0x00, 0x00, 0x11 }, - Package () { 0x0008FFFF, 0x01, 0x00, 0x12 }, - Package () { 0x0008FFFF, 0x02, 0x00, 0x13 }, - Package () { 0x0008FFFF, 0x03, 0x00, 0x10 }, - - Package () { 0x0009FFFF, 0x00, 0x00, 0x12 }, - Package () { 0x0009FFFF, 0x01, 0x00, 0x13 }, - Package () { 0x0009FFFF, 0x02, 0x00, 0x10 }, - Package () { 0x0009FFFF, 0x03, 0x00, 0x11 }, - - Package () { 0x000AFFFF, 0x00, 0x00, 0x13 }, - Package () { 0x000AFFFF, 0x01, 0x00, 0x10 }, - Package () { 0x000AFFFF, 0x02, 0x00, 0x11 }, - Package () { 0x000AFFFF, 0x03, 0x00, 0x12 }, - - Package () { 0x000BFFFF, 0x00, 0x00, 0x13 }, - Package () { 0x000BFFFF, 0x01, 0x00, 0x10 }, - Package () { 0x000BFFFF, 0x02, 0x00, 0x11 }, - Package () { 0x000BFFFF, 0x03, 0x00, 0x12 }, - - Package () { 0x000CFFFF, 0x00, 0x00, 0x10 }, - Package () { 0x000CFFFF, 0x01, 0x00, 0x11 }, - Package () { 0x000CFFFF, 0x02, 0x00, 0x12 }, - Package () { 0x000CFFFF, 0x03, 0x00, 0x13 }, - - Package () { 0x000DFFFF, 0x00, 0x00, 0x10 }, - Package () { 0x000DFFFF, 0x01, 0x00, 0x11 }, - Package () { 0x000DFFFF, 0x02, 0x00, 0x12 }, - Package () { 0x000DFFFF, 0x03, 0x00, 0x13 }, - - Package () { 0x000FFFFF, 0x00, LNKA, 0x00 }, - Package () { 0x000FFFFF, 0x01, LNKA, 0x00 }, - Package () { 0x000FFFFF, 0x02, LNKA, 0x00 }, - Package () { 0x000FFFFF, 0x03, LNKA, 0x00 }, - - /* - * USB controller. Hardwired in internal - * APIC mode, see PM pg. 137, - * "miscellaneous controls", footnote to - * "IDE interrupt select" - */ - Package () { 0x0010FFFF, 0x00, 0x00, 0x14 }, - Package () { 0x0010FFFF, 0x01, 0x00, 0x16 }, - Package () { 0x0010FFFF, 0x02, 0x00, 0x15 }, - Package () { 0x0010FFFF, 0x03, 0x00, 0x17 }, - - Package () { 0x0011FFFF, 0x00, LNKA, 0x00 }, - Package () { 0x0011FFFF, 0x01, LNKB, 0x00 }, - Package () { 0x0011FFFF, 0x02, LNKC, 0x00 }, - Package () { 0x0011FFFF, 0x03, LNKD, 0x00 }, - - Package () { 0x0012FFFF, 0x00, LNKD, 0x00 }, - Package () { 0x0012FFFF, 0x01, LNKD, 0x00 }, - Package () { 0x0012FFFF, 0x02, LNKD, 0x00 }, - Package () { 0x0012FFFF, 0x03, LNKD, 0x00 }, -}) diff --git a/src/mainboard/via/vt8454c/acpi_tables.c b/src/mainboard/via/vt8454c/acpi_tables.c deleted file mode 100644 index e936f8d7ab..0000000000 --- a/src/mainboard/via/vt8454c/acpi_tables.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <string.h> -#include <console/console.h> -#include <arch/acpi.h> -#include <arch/ioapic.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* Local Apic */ - current += acpi_create_madt_lapic((acpi_madt_lapic_t *) current, 0, 0); - - /* IOAPIC */ - current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 2, IO_APIC_ADDR, 0); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 0); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 9, 9, 0x000f); // low/level - - /* LAPIC_NMI */ - current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *) current, 0, 0x0005, 1); // high/edge - - return current; -} diff --git a/src/mainboard/via/vt8454c/board_info.txt b/src/mainboard/via/vt8454c/board_info.txt deleted file mode 100644 index b351b8e696..0000000000 --- a/src/mainboard/via/vt8454c/board_info.txt +++ /dev/null @@ -1 +0,0 @@ -Category: eval diff --git a/src/mainboard/via/vt8454c/cmos.layout b/src/mainboard/via/vt8454c/cmos.layout deleted file mode 100644 index 78149f0363..0000000000 --- a/src/mainboard/via/vt8454c/cmos.layout +++ /dev/null @@ -1,43 +0,0 @@ -## This file is part of the coreboot project. -## -## Copyright (C) 2007-2009 coresystems GmbH -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License as -## published by the Free Software Foundation; version 2 of -## the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -entries - -0 384 r 0 reserved_memory -384 1 e 4 boot_option -456 1 e 1 ECC_memory -388 4 h 0 reboot_counter -#392 3 r 0 unused -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -6 5 Notice -6 6 Info -6 7 Debug -6 8 Spew - -checksums - -checksum 392 1007 1008 diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb deleted file mode 100644 index 31cb11e223..0000000000 --- a/src/mainboard/via/vt8454c/devicetree.cb +++ /dev/null @@ -1,53 +0,0 @@ -chip northbridge/via/cx700 - device cpu_cluster 0 on - chip cpu/via/c7 - device lapic 0 on end - end - end - device domain 0 on - device pci 0.0 on end # AGP Bridge - device pci 0.1 on end # Error Reporting - device pci 0.2 on end # Host Bus Control - device pci 0.3 on end # Memory Controller - device pci 0.4 on end # Power Management - device pci 0.7 on end # V-Link Controller - device pci 1.0 on # PCI Bridge - device pci 0.0 on end # Onboard Video - end # PCI Bridge - device pci f.0 on end # IDE/SATA - #device pci f.1 on end # IDE - device pci 10.0 on end # USB 1.1 - device pci 10.1 on end # USB 1.1 - device pci 10.2 on end # USB 1.1 - device pci 10.4 on end # USB 2.0 - device pci 11.0 on # Southbridge LPC - chip superio/via/vt1211 - device pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 on # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - drq 0x74 = 3 - end - device pnp 2e.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.b on # HWM - io 0x60 = 0xec00 - end - end # superio - end # pci 11.0 - # 1-4 non existent - #device pci 11.5 on end # AC97 Audio - #device pci 11.6 off end # AC97 Modem - #device pci 12.0 on end # Ethernet - end # pci domain 0 -end # cx700 diff --git a/src/mainboard/via/vt8454c/dsdt.asl b/src/mainboard/via/vt8454c/dsdt.asl deleted file mode 100644 index 473bc851be..0000000000 --- a/src/mainboard/via/vt8454c/dsdt.asl +++ /dev/null @@ -1,335 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com> - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -DefinitionBlock ("dsdt.aml", "DSDT", 1, "CX700 ", "COREBOOT", 0x00000001) -{ - /* - * Define the main processor - */ - Scope (\_PR) - { - Processor (\_PR.CP00, 0x00, 0x00000410, 0x06) {} - } - - /* For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * any others would involve declaring the wake up methods - */ - Name (\_S0, Package () {0x00, 0x00, 0x00, 0x00 }) - Name (\_S5, Package () {0x02, 0x02, 0x00, 0x00 }) - - Scope (\) { - Name (PICF , 0) // Global flag indicating whether to use PIC or APIC mode - Method ( _PIC,1) // The OS is calling this - { - Store( Arg0 , PICF) - } - } // end of \ scope - - /* Root of the bus hierarchy */ - Scope (\_SB) - { - /* Define how interrupt Link A is plumbed in */ - Device (LNKA) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x01) - - /* Status - always return ready */ - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - - /* Current Resources - return irq set up in BIOS */ - Method (_CRS, 0, NotSerialized) - { - Name (CRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {11} - }) - Name (CRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16} - }) - - If (LNot (PICF)) { - Return (CRSP) - } Else { - Return (CRSA) - } - } - /* Possible Resources - return the range of irqs - * we are using for PCI - only here to keep Linux ACPI - * happy - */ - Method (_PRS, 0, NotSerialized) - { - Name (PRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {3,4,6,7,10,11,12} - }) - Name (PRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16,17,18,19,20,21,22,23} - }) - - If (LNot (PICF)) { - Return (PRSP) - } Else { - Return (PRSA) - } - - } - /* Set Resources - dummy function to keep Linux ACPI happy - * Linux is more than happy not to tinker with irq - * assignments as long as the CRS and STA functions - * return good values - */ - Method (_SRS, 1, NotSerialized ) {} - /* Disable - dummy function to keep Linux ACPI happy */ - Method (_DIS, 0, NotSerialized ) {} - - } // End of LNKA - - /* Define how interrupt Link B is plumbed in */ - Device (LNKB) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x02) - - /* Status - always return ready */ - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - - /* Current Resources - return irq set up in BIOS */ - Method (_CRS, 0, NotSerialized) - { - Name (CRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {11} - }) - Name (CRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {17} - }) - - If (LNot (PICF)) { - Return (CRSP) - } Else { - Return (CRSA) - } - } - /* Possible Resources - return the range of irqs - * we are using for PCI - only here to keep Linux ACPI - * happy - */ - Method (_PRS, 0, NotSerialized) - { - Name (PRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {3,4,6,7,10,11,12} - }) - Name (PRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16,17,18,19,20,21,22,23} - }) - - If (LNot (PICF)) { - Return (PRSP) - } Else { - Return (PRSA) - } - - } - - /* Set Resources - dummy function to keep Linux ACPI happy - * Linux is more than happy not to tinker with irq - * assignments as long as the CRS and STA functions - * return good values - */ - Method (_SRS, 1, NotSerialized ) {} - /* Disable - dummy function to keep Linux ACPI happy */ - Method (_DIS, 0, NotSerialized ) {} - - } // End of LNKB - - /* Define how interrupt Link C is plumbed in */ - Device (LNKC) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x03) - - /* Status - always return ready */ - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - - /* Current Resources - return irq set up in BIOS */ - Method (_CRS, 0, NotSerialized) - { - Name (CRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {10} - }) - Name (CRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {18} - }) - - If (LNot (PICF)) { - Return (CRSP) - } Else { - Return (CRSA) - } - } - /* Possible Resources - return the range of irqs - * we are using for PCI - only here to keep Linux ACPI - * happy - */ - Method (_PRS, 0, NotSerialized) - { - Name (PRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {3,4,6,7,10,11,12} - }) - Name (PRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16,17,18,19,20,21,22,23} - }) - - If (LNot (PICF)) { - Return (PRSP) - } Else { - Return (PRSA) - } - - } - - /* Set Resources - dummy function to keep Linux ACPI happy - * Linux is more than happy not to tinker with irq - * assignments as long as the CRS and STA functions - * return good values - */ - Method (_SRS, 1, NotSerialized ) {} - /* Disable - dummy function to keep Linux ACPI happy */ - Method (_DIS, 0, NotSerialized ) {} - - } // End of LNKC - - /* Define how interrupt Link D is plumbed in */ - Device (LNKD) - { - Name (_HID, EisaId ("PNP0C0F")) - Name (_UID, 0x04) - - /* Status - always return ready */ - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - - /* Current Resources - return irq set up in BIOS */ - Method (_CRS, 0, NotSerialized) - { - Name (CRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {10} - }) - Name (CRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {19} - }) - - If (LNot (PICF)) { - Return (CRSP) - } Else { - Return (CRSA) - } - } - /* Possible Resources - return the range of irqs - * we are using for PCI - only here to keep Linux ACPI - * happy - */ - Method (_PRS, 0, NotSerialized) - { - Name (PRSP, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {3,4,6,7,10,11,12} - }) - Name (PRSA, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16,17,18,19,20,21,22,23} - }) - - If (LNot (PICF)) { - Return (PRSP) - } Else { - Return (PRSA) - } - - } - - /* Set Resources - dummy function to keep Linux ACPI happy - * Linux is more than happy not to tinker with irq - * assignments as long as the CRS and STA functions - * return good values - */ - Method (_SRS, 1, NotSerialized ) {} - /* Disable - dummy function to keep Linux ACPI happy */ - Method (_DIS, 0, NotSerialized ) {} - - } // End of LNKD - - /* PCI Root Bridge */ - Device (PCI0) - { - Name (_HID, EisaId ("PNP0A08")) - Name (_CID, EisaId ("PNP0A03")) - Name (_ADR, 0x00) - Name (_UID, 0x00) - Name (_BBN, 0x00) - - // Mainboard specific IRQ routing - #include "acpi/irq.asl" - - /* PCI Routing Table */ - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) - { - Return (PICM) - } - Else - { - Return (APIC) - } - } - - Device (P2PB) /* PCI to PCI bridge */ - { - Name (_ADR, 0x00130001) - - #include "acpi/irq-p2p-bridge.asl" - Method (_PRT, 0, NotSerialized) - { - If (LNot (PICF)) - { - Return (PICM) - } - Else - { - Return (APIC) - } - } - /* Status - always return ready */ - Method (_STA, 0, NotSerialized) - { - Return (0x0F) - } - } - } // End of PCI0 - } // End of _SB -} // End of Definition Block diff --git a/src/mainboard/via/vt8454c/fadt.c b/src/mainboard/via/vt8454c/fadt.c deleted file mode 100644 index 5a7ffa9bff..0000000000 --- a/src/mainboard/via/vt8454c/fadt.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <string.h> -#include <arch/acpi.h> - -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = 244; - header->revision = 3; - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = 0; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->preferred_pm_profile = 0; - fadt->sci_int = 0x9; - fadt->smi_cmd = 0x0; - fadt->acpi_enable = 0xA1; - fadt->acpi_disable = 0xA0; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0x0; - - fadt->pm1a_evt_blk = 0x400; - fadt->pm1b_evt_blk = 0x0; - fadt->pm1a_cnt_blk = 0x404; - fadt->pm1b_cnt_blk = 0x0; - fadt->pm2_cnt_blk = 0x22; - fadt->pm_tmr_blk = 0x408; - fadt->gpe0_blk = 0x420; - fadt->gpe1_blk = 0x450; - - fadt->pm1_evt_len = 4; - fadt->pm1_cnt_len = 2; - fadt->pm2_cnt_len = 1; - fadt->pm_tmr_len = 4; - fadt->gpe0_blk_len = 4; - fadt->gpe1_blk_len = 4; - fadt->gpe1_base = 0x10; - fadt->cst_cnt = 0; - fadt->p_lvl2_lat = 101; - fadt->p_lvl3_lat = 1001; - fadt->flush_size = 0; - fadt->flush_stride = 0; - fadt->duty_offset = 0; - fadt->duty_width = 1; - fadt->day_alrm = 0x7d; - fadt->mon_alrm = 0x7e; - fadt->century = 0x32; - fadt->iapc_boot_arch = 0x0; - fadt->flags = 0x44a5; - - fadt->reset_reg.space_id = 0; - fadt->reset_reg.bit_width = 0; - fadt->reset_reg.bit_offset = 0; - fadt->reset_reg.resv = 0; - fadt->reset_reg.addrl = 0x0; - fadt->reset_reg.addrh = 0x0; - - fadt->reset_value = 0; - fadt->x_firmware_ctl_l = (unsigned long) facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long) dsdt; - fadt->x_dsdt_h = 0; - - fadt->x_pm1a_evt_blk.space_id = 1; - fadt->x_pm1a_evt_blk.bit_width = 4; - fadt->x_pm1a_evt_blk.bit_offset = 0; - fadt->x_pm1a_evt_blk.resv = 0; - fadt->x_pm1a_evt_blk.addrl = 0x400; - fadt->x_pm1a_evt_blk.addrh = 0x0; - - - fadt->x_pm1b_evt_blk.space_id = 1; - fadt->x_pm1b_evt_blk.bit_width = 4; - fadt->x_pm1b_evt_blk.bit_offset = 0; - fadt->x_pm1b_evt_blk.resv = 0; - fadt->x_pm1b_evt_blk.addrl = 0x0; - fadt->x_pm1b_evt_blk.addrh = 0x0; - - - fadt->x_pm1a_cnt_blk.space_id = 1; - fadt->x_pm1a_cnt_blk.bit_width = 2; - fadt->x_pm1a_cnt_blk.bit_offset = 0; - fadt->x_pm1a_cnt_blk.resv = 0; - fadt->x_pm1a_cnt_blk.addrl = 0x404; - fadt->x_pm1a_cnt_blk.addrh = 0x0; - - - fadt->x_pm1b_cnt_blk.space_id = 1; - fadt->x_pm1b_cnt_blk.bit_width = 2; - fadt->x_pm1b_cnt_blk.bit_offset = 0; - fadt->x_pm1b_cnt_blk.resv = 0; - fadt->x_pm1b_cnt_blk.addrl = 0x0; - fadt->x_pm1b_cnt_blk.addrh = 0x0; - - - fadt->x_pm2_cnt_blk.space_id = 1; - fadt->x_pm2_cnt_blk.bit_width = 0; - fadt->x_pm2_cnt_blk.bit_offset = 0; - fadt->x_pm2_cnt_blk.resv = 0; - fadt->x_pm2_cnt_blk.addrl = 0x0; - fadt->x_pm2_cnt_blk.addrh = 0x0; - - - fadt->x_pm_tmr_blk.space_id = 1; - fadt->x_pm_tmr_blk.bit_width = 4; - fadt->x_pm_tmr_blk.bit_offset = 0; - fadt->x_pm_tmr_blk.resv = 0; - fadt->x_pm_tmr_blk.addrl = 0x408; - fadt->x_pm_tmr_blk.addrh = 0x0; - - - fadt->x_gpe0_blk.space_id = 1; - fadt->x_gpe0_blk.bit_width = 0; - fadt->x_gpe0_blk.bit_offset = 0; - fadt->x_gpe0_blk.resv = 0; - fadt->x_gpe0_blk.addrl = 0x420; - fadt->x_gpe0_blk.addrh = 0x0; - - - fadt->x_gpe1_blk.space_id = 1; - fadt->x_gpe1_blk.bit_width = 0; - fadt->x_gpe1_blk.bit_offset = 0; - fadt->x_gpe1_blk.resv = 0; - fadt->x_gpe1_blk.addrl = 0x0; - fadt->x_gpe1_blk.addrh = 0x0; - - header->checksum = - acpi_checksum((void *) fadt, sizeof(acpi_fadt_t)); - -} diff --git a/src/mainboard/via/vt8454c/irq_tables.c b/src/mainboard/via/vt8454c/irq_tables.c deleted file mode 100644 index 52f6288e38..0000000000 --- a/src/mainboard/via/vt8454c/irq_tables.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x11 << 3) | 0x0, /* Where the interrupt router lies (dev) */ - 0xc20, /* IRQs devoted exclusively to PCI usage */ - 0x1106, /* Vendor */ - 0x596, /* Device */ - 0, /* Miniport data */ - {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */ - 0x84, /* u8 checksum. This has to be set to some - value that would give 0 after the sum of all - bytes for this structure (including checksum) */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x08 << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x1, 0x0}, - {0x00, (0x09 << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0x0deb8}}, 0x2, 0x0}, - {0x00, (0x0a << 3) | 0x0, {{0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x3, 0x0}, - {0x02, (0x03 << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x4, 0x0}, - {0x02, (0x04 << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0x0deb8}}, 0x5, 0x0}, - {0x02, (0x05 << 3) | 0x0, {{0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x6, 0x0}, - {0x02, (0x06 << 3) | 0x0, {{0x05, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0x0deb8}}, 0x7, 0x0}, - {0x02, (0x07 << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x8, 0x0}, - {0x02, (0x08 << 3) | 0x0, {{0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x9, 0x0}, - {0x00, (0x01 << 3) | 0x0, {{0x02, 0xdeb8}, {0x02, 0xdeb8}, {0x02, 0xdeb8}, {0x02, 0x0deb8}}, 0x0, 0x0}, - {0x80, (0x01 << 3) | 0x0, {{0x02, 0xdeb8}, {0x02, 0xdeb8}, {0x02, 0xdeb8}, {0x02, 0x0deb8}}, 0x0, 0x0}, - {0x00, (0x11 << 3) | 0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, - {0x00, (0x0f << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, - {0x00, (0x01 << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, - {0x00, (0x10 << 3) | 0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0} - } -}; - -inline unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/via/vt8454c/mptable.c b/src/mainboard/via/vt8454c/mptable.c deleted file mode 100644 index fc6a56a260..0000000000 --- a/src/mainboard/via/vt8454c/mptable.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> -#include <device/pci.h> -#include <arch/smp/mpspec.h> -#include <arch/ioapic.h> -#include <cpu/x86/lapic.h> -#include <console/console.h> -#include <string.h> -#include <stdint.h> - -static void *smp_write_config_table(void *v) -{ - struct mp_config_table *mc; - int isa_bus; - - mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); - - mptable_init(mc, LOCAL_APIC_ADDR); - - smp_write_processors(mc); - mptable_write_buses(mc, NULL, &isa_bus); - - /* I/O APICs: APIC ID Version State Address */ - smp_write_ioapic(mc, 2, 17, VIO_APIC_VADDR); - - mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0); - - /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x40, 0x2, 0x14); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x41, 0x2, 0x16); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x42, 0x2, 0x15); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x43, 0x2, 0x17); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x80, 0x4, 0x2, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x2, 0x10, 0x2, 0x11); - - /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ - mptable_lintsrc(mc, 0x0); - - /* Compute the checksums */ - return mptable_finalize(mc); -} - -unsigned long write_smp_table(unsigned long addr) -{ - void *v; - v = smp_write_floating_table(addr, 0); - return (unsigned long)smp_write_config_table(v); -} diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c deleted file mode 100644 index 31f4b06313..0000000000 --- a/src/mainboard/via/vt8454c/romstage.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <lib.h> -#include <northbridge/via/cx700/raminit.h> -#include <cpu/x86/bist.h> -#include <delay.h> -#include "northbridge/via/cx700/early_smbus.c" -#include "lib/debug.c" -#include "northbridge/via/cx700/early_serial.c" -#include "northbridge/via/cx700/raminit.c" -#include <spd.h> - -static void enable_mainboard_devices(void) -{ - pci_devfn_t dev; - - dev = pci_locate_device(PCI_ID(0x1106, 0x8324), 0); - if (dev == PCI_DEV_INVALID) { - die("LPC bridge not found!!!\n"); - } - // Disable GP3 - pci_write_config8(dev, 0x98, 0x00); - - // Disable mc97 - pci_write_config8(dev, 0x50, 0x80); - - // Disable internal KBC Configuration - pci_write_config8(dev, 0x51, 0x2d); - pci_write_config8(dev, 0x58, 0x42); - pci_write_config8(dev, 0x59, 0x80); - pci_write_config8(dev, 0x5b, 0x01); - - // Enable P2P Bridge Header for External PCI BUS. - dev = pci_locate_device(PCI_ID(0x1106, 0x324e), 0); - if (dev == PCI_DEV_INVALID) { - die("P2P bridge not found!!!\n"); - } - pci_write_config8(dev, 0x4f, 0x41); - - // Switch SATA to non-RAID mode - dev = pci_locate_device(PCI_ID(0x1106, 0x0581), 0); - if (dev != PCI_DEV_INVALID) { - pci_write_config16(dev, 0xBA, 0x5324); - } -} - -static void enable_shadow_ram(const struct mem_controller *ctrl) -{ - u8 shadowreg; - - pci_write_config8(PCI_DEV(0, 0, 3), 0x80, 0x2a); - - /* 0xf0000-0xfffff - ACPI tables */ - shadowreg = pci_read_config8(PCI_DEV(0, 0, 3), 0x83); - shadowreg |= 0x30; - pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg); -} - -void main(unsigned long bist) -{ - /* Set statically so it should work with cx700 as well */ - static const struct mem_controller cx700[] = { - { - .channel0 = {DIMM0, DIMM1}, - }, - }; - - enable_smbus(); - - enable_cx700_serial(); - console_init(); - - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - - enable_mainboard_devices(); - - /* Allows access to all northbridge devices */ - pci_write_config8(PCI_DEV(0, 0, 0), 0x4f, 0x01); - - sdram_set_registers(cx700); - enable_shadow_ram(cx700); - sdram_enable(cx700); -} |