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-rw-r--r--src/northbridge/intel/haswell/finalize.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index 1c83110a60..22f98625aa 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -17,6 +17,9 @@ void intel_northbridge_haswell_finalize_smm(void)
pci_or_config32(HOST_BRIDGE, TSEG, 1 << 0);
pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0);
+ /* Memory Controller Lockdown */
+ MCHBAR32(MC_LOCK) |= 0x8f;
+
MCHBAR32_OR(MMIO_PAVP_MSG, 1 << 0); /* PAVP */
MCHBAR32_OR(PCU_DDR_PTM_CTL, 1 << 5); /* DDR PTM */
MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */
@@ -26,9 +29,6 @@ void intel_northbridge_haswell_finalize_smm(void)
MCHBAR32_OR(CRDTLCK, 1 << 0);
MCHBAR32_OR(MCARBLCK, 1 << 0);
- /* Memory Controller Lockdown */
- MCHBAR8(MC_LOCK) = 0x8f;
-
/* Read+write the following */
MCHBAR32(VDMBDFBARKVM) = MCHBAR32(VDMBDFBARKVM);
MCHBAR32(VDMBDFBARPAVP) = MCHBAR32(VDMBDFBARPAVP);