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-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index ef4ae455f8..0939fe6348 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1954,6 +1954,7 @@ static int jedec_write_leveling(ramctr_timing *ctrl)
write_mrreg(ctrl, channel, slotrank, 1,
make_mr1(ctrl, slotrank, channel) | 1 << 12 | 1 << 7);
+ /* Needs to be programmed before I/O reset below */
const union gdcr_training_mod_reg training_mod = {
.write_leveling_mode = 1,
.enable_dqs_wl = 5,