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-rw-r--r--src/soc/intel/skylake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/skylake/romstage/power_state.c7
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc
index 00943bad38..194091f811 100644
--- a/src/soc/intel/skylake/romstage/Makefile.inc
+++ b/src/soc/intel/skylake/romstage/Makefile.inc
@@ -1,5 +1,6 @@
verstage-y += cpu.c
verstage-y += pch.c
+verstage-y += power_state.c
verstage-y += report_platform.c
verstage-y += romstage.c
verstage-y += smbus.c
diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c
index d91e197711..cbef09a96c 100644
--- a/src/soc/intel/skylake/romstage/power_state.c
+++ b/src/soc/intel/skylake/romstage/power_state.c
@@ -30,6 +30,7 @@
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/romstage.h>
+#include <vendorcode/google/chromeos/vboot_common.h>
static struct chipset_power_state power_state CAR_GLOBAL;
@@ -151,3 +152,9 @@ struct chipset_power_state *fill_power_state(void)
return ps;
}
+
+int vboot_platform_is_resuming(void)
+{
+ int typ = (inl(ACPI_BASE_ADDRESS + PM1_CNT) & SLP_TYP) >> SLP_TYP_SHIFT;
+ return typ == SLP_TYP_S3;
+}