diff options
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 2 |
2 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 56c7da776d..7561414c55 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -297,21 +297,15 @@ config PSP_APOB_DESTINATION config PSP_APOB_NV_ADDRESS hex "Base address of APOB NV" - default 0xffa68000 help Location in flash where the PSP can find the S3 restore information. Place this on a boundary that the flash device can erase. - TODO: The above default value is arbitrary, but eventually coreboot's - MRC cache base address should be used. config PSP_APOB_NV_SIZE hex "Size of APOB NV to be reserved" - default 0x10000 help Size of the S3 restore information. Make this a multiple of the size the flash device can erase. - TODO: The above default value is arbitrary, but eventually coreboot's - MRC cache size should be used. config USE_PSPSCUREOS bool "Include PSP SecureOS blobs in PSP build" diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 4492653713..f1e10c183f 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -207,8 +207,10 @@ PSP_BIOSBIN_DEST=$(CONFIG_ROMSTAGE_ADDR) PSP_BIOSBIN_SIZE=$(CONFIG_RAM_RESET_VECTOR_STAGE_SIZE) # type = 0x63 +ifeq ($(CONFIG_HAVE_ACPI_RESUME),y) PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS) PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE) +endif # type2 = 0x64, 0x65 PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin |