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-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb3
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb3
-rw-r--r--src/soc/intel/jasperlake/chip.h1
-rw-r--r--src/soc/intel/jasperlake/fsp_params.c4
4 files changed, 3 insertions, 8 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index c23717eabc..1f72eb1432 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -155,9 +155,6 @@ chip soc/intel/jasperlake
.tdp_pl2_override = 20,
}"
- # Enable processor thermal control
- register "Device4Enable" = "1"
-
register "tcc_offset" = "10" # TCC of 90C
# chipset_lockdown configuration
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 035ccbd301..f8fea47aa5 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -128,9 +128,6 @@ chip soc/intel/jasperlake
# Enable DPTF
register "dptf_enable" = "1"
- # Enable Processor Thermal Control
- register "Device4Enable" = "1"
-
# Add PL1 and PL2 values
register "power_limits_config" = "{
.tdp_pl1_override = 6,
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3f0b910327..6b5f599911 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -142,7 +142,6 @@ struct soc_intel_jasperlake_config {
uint8_t SkipExtGfxScan;
uint32_t GraphicsConfigPtr;
- uint8_t Device4Enable;
/* HeciEnabled decides the state of Heci1 at end of boot
* Setting to 0 (default) disables Heci1 and hides the device from OS */
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index ff9bfbfe72..cdd088eb26 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -183,7 +183,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
if (params->ScsSdCardEnabled)
params->SdCardPowerEnableActiveHigh = config->SdCardPowerEnableActiveHigh;
- params->Device4Enable = config->Device4Enable;
+ /* Enable Processor Thermal Control */
+ dev = pcidev_path_on_root(SA_DEVFN_DPTF);
+ params->Device4Enable = is_dev_enabled(dev);
/* Set TccActivationOffset */
params->TccActivationOffset = config->tcc_offset;