diff options
| -rw-r--r-- | src/southbridge/amd/Kconfig | 5 | ||||
| -rw-r--r-- | src/southbridge/amd/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Kconfig | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/Kconfig | 9 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/Kconfig | 8 | ||||
| -rwxr-xr-x | src/southbridge/amd/cimx/sb900/Kconfig | 9 |
6 files changed, 35 insertions, 6 deletions
diff --git a/src/southbridge/amd/Kconfig b/src/southbridge/amd/Kconfig index 23f6c066fd..867afcaf8b 100644 --- a/src/southbridge/amd/Kconfig +++ b/src/southbridge/amd/Kconfig @@ -14,8 +14,3 @@ source src/southbridge/amd/sb800/Kconfig source src/southbridge/amd/cimx/Kconfig source src/southbridge/amd/agesa/Kconfig source src/southbridge/amd/sr5650/Kconfig - -# This can be overriden by mainboard/Kconfig -config S3_VOLATILE_POS - hex - default 0xFFFF0000 diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc index d2b9b653e5..1e3309abcb 100644 --- a/src/southbridge/amd/Makefile.inc +++ b/src/southbridge/amd/Makefile.inc @@ -19,7 +19,7 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += agesa ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) ifeq ($(CONFIG_CPU_AMD_AGESA), y) -$(obj)/s3.rom: +$(obj)/s3.rom: $(obj)/config.h echo " S3 NVRAM $(CONFIG_S3_VOLATILE_POS) (S3 storage area)" # force C locale, so cygwin awk doesn't try to interpret the 0xff below as UTF-8 (or worse) LC_ALL=C awk 'BEGIN {for (i=0; i<32768; i++) {printf "%c", 255}}' > $@.tmp diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index e3fc8c757d..f58f920eb7 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -205,4 +205,12 @@ config RAID_MISC_ROM_POSITION The CONFIG_ROM_SIZE must larger than 0x100000. endif +config S3_VOLATILE_POS + hex "S3 volatile storage position" + default 0xFFFF0000 + depends on HAVE_ACPI_RESUME + help + For a system with S3 feature, the BIOS needs to save some data to + non-volitile storage at cold boot stage. + endif diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index 27338fc63d..f139450300 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -59,5 +59,14 @@ config REDIRECT_SBCIMX_TRACE_TO_SERIAL debug information to the serial console. Warning: Only enable this option when debuging or tracing AMD CIMX code. + +config S3_VOLATILE_POS + hex "S3 volatile storage position" + default 0xFFFF0000 + depends on HAVE_ACPI_RESUME + help + For a system with S3 feature, the BIOS needs to save some data to + non-volitile storage at cold boot stage. + endif #SOUTHBRIDGE_AMD_CIMX_SB700 diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 79624e00c4..4ac2094d4d 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -122,5 +122,13 @@ config RAID_MISC_ROM_POSITION endif +config S3_VOLATILE_POS + hex "S3 volatile storage position" + default 0xFFFF0000 + depends on HAVE_ACPI_RESUME + help + For a system with S3 feature, the BIOS needs to save some data to + non-volitile storage at cold boot stage. + endif #SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig index 253d73f393..acc369e667 100755 --- a/src/southbridge/amd/cimx/sb900/Kconfig +++ b/src/southbridge/amd/cimx/sb900/Kconfig @@ -52,5 +52,14 @@ config ACPI_SCI_IRQ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/amd/cimx/sb900/bootblock.c" + +config S3_VOLATILE_POS + hex "S3 volatile storage position" + default 0xFFFF0000 + depends on HAVE_ACPI_RESUME + help + For a system with S3 feature, the BIOS needs to save some data to + non-volitile storage at cold boot stage. + endif #SOUTHBRIDGE_AMD_CIMX_SB900 |