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-rw-r--r--src/soc/intel/skylake/chip.h3
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c1
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index ec8b461647..5bf39318bb 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -154,6 +154,9 @@ struct soc_intel_skylake_config {
/* Enable/disable Rank Margin Tool */
u8 Rmt;
+ /* Disable Command TriState */
+ u8 CmdTriStateDis;
+
/* Lan */
u8 EnableLan;
u8 EnableLanLtr;
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 64f9d7d2be..45fb2d0ef3 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -224,6 +224,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->SaGv = config->SaGv;
m_cfg->UserBd = BOARD_TYPE_ULT_ULX;
m_cfg->RMT = config->Rmt;
+ m_cfg->CmdTriStateDis = config->CmdTriStateDis;
m_cfg->DdrFreqLimit = config->DdrFreqLimit;
m_cfg->VmxEnable = config->VmxEnable;
m_cfg->PrmrrSize = config->PrmrrSize;