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-rw-r--r--Documentation/POSTCODES1
-rw-r--r--src/include/console/post_codes.h7
-rw-r--r--src/soc/intel/quark/romstage/fsp2_0.c3
3 files changed, 10 insertions, 1 deletions
diff --git a/Documentation/POSTCODES b/Documentation/POSTCODES
index 2340fac049..162e863fed 100644
--- a/Documentation/POSTCODES
+++ b/Documentation/POSTCODES
@@ -17,6 +17,7 @@ This is an (incomplete) list of POST codes emitted by coreboot v4.
0x88 Devices have been configured
0x89 Devices have been enabled
0xe0 Boot media (e.g. SPI ROM) is corrupt
+0xe1 Resource stored within CBFS is corrupt
0xf8 Entry into elf boot
0xf3 Jumping to payload
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index 775f78d603..7bd1ee0798 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -326,6 +326,13 @@
#define POST_INVALID_ROM 0xe0
/**
+ * \brief Invalid or corrupt CBFS
+ *
+ * Set if firmware failed to find or validate a resource that is stored in CBFS.
+ */
+#define POST_INVALID_CBFS 0xe1
+
+/**
* \brief TPM failure
*
* An error with the TPM, either unexepcted state or communications failure.
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index 2ec16c9f34..e4abcc034a 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -116,7 +116,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version)
/* Locate the RMU data file in flash */
rmu_data = locate_rmu_file(&rmu_data_len);
if (!rmu_data)
- die("Microcode file (rmu.bin) not found.");
+ die_with_post_code(POST_INVALID_CBFS,
+ "Microcode file (rmu.bin) not found.");
/* Locate the configuration data from devicetree.cb */
dev = pcidev_path_on_root(LPC_DEV_FUNC);