8 files changed, 18 insertions, 5 deletions

diff --git a/src/mainboard/google/beltino/Kconfig b/src/mainboard/google/beltino/Kconfig
index 4aff149e0d..0c9311f70c 100644
--- a/src/mainboard/google/beltino/Kconfig
+++ b/src/mainboard/google/beltino/Kconfig
@@ -57,4 +57,7 @@ config MAINBOARD_SMBIOS_MANUFACTURER
 	string
 	default "GOOGLE"
 
+config ENABLE_DDR_2X_REFRESH
+	default y
+
 endif # BOARD_GOOGLE_BASEBOARD_BELTINO
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index 54295a4597..8b3ace2eea 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -45,8 +45,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 	pei_data->spd_addresses[0] = 0xa0;
 	pei_data->spd_addresses[2] = 0xa4;
 	pei_data->ec_present = 0;
-	/* Enable 2x refresh mode */
-	pei_data->ddr_refresh_2x = 1;
 	pei_data->dq_pins_interleaved = 1;
 	pei_data->usb_xhci_on_resume = 1;
 
diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig
index 566d9b6972..37c11e047f 100644
--- a/src/mainboard/google/slippy/Kconfig
+++ b/src/mainboard/google/slippy/Kconfig
@@ -65,4 +65,7 @@ config MAINBOARD_SMBIOS_MANUFACTURER
 	string
 	default "GOOGLE"
 
+config ENABLE_DDR_2X_REFRESH
+	default y if BOARD_GOOGLE_FALCO
+
 endif # BOARD_GOOGLE_BASEBOARD_SLIPPY
diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c
index 11515cf671..e4af352e61 100644
--- a/src/mainboard/google/slippy/variants/falco/romstage.c
+++ b/src/mainboard/google/slippy/variants/falco/romstage.c
@@ -52,8 +52,6 @@ void copy_spd(struct pei_data *peid)
 
 void variant_romstage_entry(struct pei_data *pei_data)
 {
-	pei_data->ddr_refresh_2x = 1; /* Enable 2x refresh mode */
-
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0064, 1, 0,               /* P0: Port A, CN8 */
diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig b/src/mainboard/supermicro/x10slm-f/Kconfig
index e0cefcefb7..dde9bc16f7 100644
--- a/src/mainboard/supermicro/x10slm-f/Kconfig
+++ b/src/mainboard/supermicro/x10slm-f/Kconfig
@@ -29,4 +29,7 @@ config MAINBOARD_PART_NUMBER
 	string
 	default "X10SLM+-F"
 
+config ENABLE_DDR_2X_REFRESH
+	default y
+
 endif
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index 8c383802e4..ddef657d41 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -24,7 +24,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 	pei_data->spd_addresses[2] = 0xa4;
 	pei_data->spd_addresses[3] = 0xa6;
 	pei_data->ec_present = 0;
-	pei_data->ddr_refresh_2x = 1;
 
 	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 6501bc41a8..952cc7b039 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -98,4 +98,12 @@ config RO_REGION_ONLY
 config INTEL_GMA_BCLV_OFFSET
 	default 0x48254
 
+config ENABLE_DDR_2X_REFRESH
+	bool "Enable DRAM Refresh 2x support"
+	default n
+	help
+	  When enabled, the memory controller will refresh the DRAM twice as often.
+	  This probably only happens when the DRAM gets hot, but what MRC exactly
+	  does when this setting is enabled has not been investigated.
+
 endif
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index ca948132b3..42a2a56c66 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -52,6 +52,7 @@ void mainboard_romstage_entry(void)
 		.gpiobase = DEFAULT_GPIOBASE,
 		.temp_mmio_base = 0xfed08000,
 		.tseg_size = CONFIG_SMM_TSEG_SIZE,
+		.ddr_refresh_2x = CONFIG(ENABLE_DDR_2X_REFRESH),
 		.max_ddr3_freq = 1600,
 	};