summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Makefile.inc1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c (renamed from src/mainboard/intel/cannonlake_rvp/romstage.c)3
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
index 7e8219640d..c18fd9b34d 100644
--- a/src/mainboard/intel/cannonlake_rvp/Makefile.inc
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -22,6 +22,7 @@ bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
+romstage-y += romstage_fsp_params.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-y += mainboard.c
diff --git a/src/mainboard/intel/cannonlake_rvp/romstage.c b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
index e0699da500..457be7f2c7 100644
--- a/src/mainboard/intel/cannonlake_rvp/romstage.c
+++ b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
@@ -1,8 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2016 Google Inc.
- * Copyright (C) 2017 Intel Corp.
+ * Copyright (C) 2018 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by