diff options
91 files changed, 138 insertions, 32 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 98cb15a247..f0c0c80260 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -202,12 +202,10 @@ static __always_inline void write64(volatile void *addr, } #endif -typedef u32 pnp_devfn_t; +#include <device/pnp_type.h> #ifdef __SIMPLE_DEVICE__ -#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) - /* Generic functions for pnp devices */ static __always_inline void pnp_write_config( pnp_devfn_t dev, uint8_t reg, uint8_t value) diff --git a/src/ec/google/wilco/bootblock.c b/src/ec/google/wilco/bootblock.c index 183edf3eda..74578069dc 100644 --- a/src/ec/google/wilco/bootblock.c +++ b/src/ec/google/wilco/bootblock.c @@ -15,6 +15,7 @@ #include <arch/io.h> #include <endian.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include "bootblock.h" diff --git a/src/ec/hp/kbc1126/early_init.c b/src/ec/hp/kbc1126/early_init.c index 2a74a93a1a..844794e9b2 100644 --- a/src/ec/hp/kbc1126/early_init.c +++ b/src/ec/hp/kbc1126/early_init.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include "ec.h" diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h new file mode 100644 index 0000000000..370ede8bdd --- /dev/null +++ b/src/include/device/pnp_ops.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DEVICE_PNP_OPS_H__ +#define __DEVICE_PNP_OPS_H__ + +/* FIXME: We only want the PNP ops. */ +#include <arch/io.h> + +#endif diff --git a/src/include/device/pnp_type.h b/src/include/device/pnp_type.h new file mode 100644 index 0000000000..db26f2f259 --- /dev/null +++ b/src/include/device/pnp_type.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DEVICE_PNP_TYPE_H__ +#define __DEVICE_PNP_TYPE_H__ + +#include <stdint.h> + +typedef u32 pnp_devfn_t; + +#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) + +#endif /* __DEVICE_PNP_TYPE_H__ */ diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index 205c08c0f1..51991248af 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -15,6 +15,7 @@ */ #include <device/pci_ops.h> +#include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c index 12f5cd4ffd..8474d189a3 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/romstage.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> #include <cpu/intel/romstage.h> diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index c6bef9f0b4..78eb65785e 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <cpu/intel/romstage.h> #include <cpu/intel/haswell/haswell.h> +#include <device/pnp_ops.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/pei_data.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c index c42b86c288..a692167dd2 100644 --- a/src/mainboard/asus/am1i-a/romstage.c +++ b/src/mainboard/asus/am1i-a/romstage.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <commonlib/loglevel.h> #include <northbridge/amd/agesa/state_machine.h> diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index db50765a82..bed5a731cf 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_type.h> #include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c index a0083fb354..94f58c1e36 100644 --- a/src/mainboard/asus/h61m-cs/romstage.c +++ b/src/mainboard/asus/h61m-cs/romstage.c @@ -17,6 +17,7 @@ #include <northbridge/intel/sandybridge/sandybridge.h> #include <device/pci_ops.h> +#include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/asus/kfsn4-dre/bootblock.c b/src/mainboard/asus/kfsn4-dre/bootblock.c index ec8b2daee1..796ca1a64e 100644 --- a/src/mainboard/asus/kfsn4-dre/bootblock.c +++ b/src/mainboard/asus/kfsn4-dre/bootblock.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <pc80/mc146818rtc.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c index 66ebbdc555..ae778f2020 100644 --- a/src/mainboard/asus/kfsn4-dre/romstage.c +++ b/src/mainboard/asus/kfsn4-dre/romstage.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c index d32b6f9735..f0506fb84e 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c +++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/dram/ddr3.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c index 649380934f..2f45113d8d 100644 --- a/src/mainboard/asus/p5gc-mx/romstage.c +++ b/src/mainboard/asus/p5gc-mx/romstage.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c index c172ef8459..c59f38cd36 100644 --- a/src/mainboard/asus/p5qpl-am/romstage.c +++ b/src/mainboard/asus/p5qpl-am/romstage.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> #include <cpu/intel/romstage.h> diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c index 63daa2ec99..73848285a9 100644 --- a/src/mainboard/asus/p8h61-m_pro/romstage.c +++ b/src/mainboard/asus/p8h61-m_pro/romstage.c @@ -14,6 +14,7 @@ */ #include <device/pci_ops.h> +#include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c index 9ac32a3675..e537c31cb4 100644 --- a/src/mainboard/biostar/am1ml/romstage.c +++ b/src/mainboard/biostar/am1ml/romstage.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> #include <commonlib/loglevel.h> diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index dcfd27ff89..2f90572b95 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c b/src/mainboard/hp/dl165_g6_fam10/bootblock.c index 7a8856605d..16908cf704 100644 --- a/src/mainboard/hp/dl165_g6_fam10/bootblock.c +++ b/src/mainboard/hp/dl165_g6_fam10/bootblock.c @@ -12,6 +12,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #define SCH4307_CONFIG_PORT 0x162e diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index fd0db728f0..dbb2aa73ad 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <halt.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> #include <cpu/intel/romstage.h> diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c index 64e8dd9ca3..345e4b7ae3 100644 --- a/src/mainboard/intel/dg41wv/romstage.c +++ b/src/mainboard/intel/dg41wv/romstage.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> #include <cpu/intel/romstage.h> diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 8a9fbf1843..52432a0cbe 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -24,6 +24,7 @@ #include <cpu/x86/lapic.h> #include <device/pci_def.h> #include <device/pci_ops.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include <pc80/mc146818rtc.h> #include <northbridge/intel/i945/i945.h> diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 533309950c..30800e8eb0 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -17,7 +17,7 @@ #include <stdint.h> #include <string.h> #include <arch/acpi.h> -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c index 6d1a80c1c1..ccd6dcd5b8 100644 --- a/src/mainboard/lenovo/t400/dock.c +++ b/src/mainboard/lenovo/t400/dock.c @@ -18,6 +18,7 @@ #define __SIMPLE_DEVICE__ #include <console/console.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/device.h> #include <device/pci.h> #include <device/pnp.h> diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index a8efa9940d..daf4179b3d 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pnp_def.h> diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 4a9757d9be..66ceffbcfb 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pnp_def.h> diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c index 33700fe3fe..df156413ea 100644 --- a/src/mainboard/lenovo/z61t/romstage.c +++ b/src/mainboard/lenovo/z61t/romstage.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pnp_def.h> diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c index 1fa2fd8b0b..29880f48fd 100644 --- a/src/mainboard/msi/ms7721/romstage.c +++ b/src/mainboard/msi/ms7721/romstage.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pnp.h> #include <stdint.h> diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 2316a054a5..0b073ed6f6 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -20,6 +20,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 9492ca1304..b36d78bd38 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index a6adb17221..eaddaf9a26 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -17,6 +17,7 @@ /* __PRE_RAM__ means: use "unsigned" for device, not a struct. */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/i82801ix/i82801ix.h> diff --git a/src/mainboard/roda/rv11/variants/rw11/romstage.c b/src/mainboard/roda/rv11/variants/rw11/romstage.c index e693f13f5c..97d9d2b099 100644 --- a/src/mainboard/roda/rv11/variants/rw11/romstage.c +++ b/src/mainboard/roda/rv11/variants/rw11/romstage.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <device/pci.h> #include <device/pci_ops.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <northbridge/intel/sandybridge/raminit.h> #include <northbridge/intel/sandybridge/raminit_native.h> diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index f61fa718da..3e09da053f 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -20,6 +20,7 @@ #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pci_ops.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c index cf71b40a20..6170739759 100644 --- a/src/mainboard/supermicro/x10slm-f/romstage.c +++ b/src/mainboard/supermicro/x10slm-f/romstage.c @@ -17,6 +17,7 @@ #include <cpu/intel/haswell/haswell.h> #include <cpu/intel/romstage.h> +#include <device/pnp_ops.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/pei_data.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c index d653b1d772..c625b5327b 100644 --- a/src/superio/fintek/common/early_serial.c +++ b/src/superio/fintek/common/early_serial.c @@ -34,6 +34,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "fintek.h" diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h index 7ad08ea30a..cbd175f7ac 100644 --- a/src/superio/fintek/common/fintek.h +++ b/src/superio/fintek/common/fintek.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_FINTEK_COMMON_PRE_RAM_H #define SUPERIO_FINTEK_COMMON_PRE_RAM_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void fintek_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/fintek/f81216h/early_serial.c b/src/superio/fintek/f81216h/early_serial.c index 9e8e48b405..1990c37ae7 100644 --- a/src/superio/fintek/f81216h/early_serial.c +++ b/src/superio/fintek/f81216h/early_serial.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "f81216h.h" diff --git a/src/superio/fintek/f81216h/f81216h.h b/src/superio/fintek/f81216h/f81216h.h index ec541657b8..1a6b6406f8 100644 --- a/src/superio/fintek/f81216h/f81216h.h +++ b/src/superio/fintek/f81216h/f81216h.h @@ -17,6 +17,8 @@ #ifndef SUPERIO_FINTEK_F81216H_H #define SUPERIO_FINTEK_F81216H_H +#include <device/pnp_type.h> + /* Logical Device Numbers (LDN). */ #define F81216H_SP1 0x00 /* UART1 (+CIR mode) */ #define F81216H_SP2 0x01 /* UART2 */ diff --git a/src/superio/intel/i8900/early_serial.c b/src/superio/intel/i8900/early_serial.c index 2ec31fa7e4..681b22599d 100644 --- a/src/superio/intel/i8900/early_serial.c +++ b/src/superio/intel/i8900/early_serial.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include "i8900.h" diff --git a/src/superio/intel/i8900/i8900.h b/src/superio/intel/i8900/i8900.h index 3879a36423..348d3c4a2f 100644 --- a/src/superio/intel/i8900/i8900.h +++ b/src/superio/intel/i8900/i8900.h @@ -17,6 +17,8 @@ #ifndef SUPERIO_INTEL_I8900_I8900_H #define SUPERIO_INTEL_I8900_I8900_H +#include <device/pnp_type.h> + /* * The SIW ("Serial I/O and Watchdog Timer") integrated into the i8900 is * very similar to a Super I/O, both in functionality and config mechanism. diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c index 24d5937ce7..6402ae9c59 100644 --- a/src/superio/ite/common/early_serial.c +++ b/src/superio/ite/common/early_serial.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "ite.h" diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h index 5b39672a5f..151ba12533 100644 --- a/src/superio/ite/common/ite.h +++ b/src/superio/ite/common/ite.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_ITE_COMMON_PRE_RAM_H #define SUPERIO_ITE_COMMON_PRE_RAM_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> #define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */ diff --git a/src/superio/ite/it8671f/early_serial.c b/src/superio/ite/it8671f/early_serial.c index 12c0ea5346..b5b94df2fa 100644 --- a/src/superio/ite/it8671f/early_serial.c +++ b/src/superio/ite/it8671f/early_serial.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_type.h> #include <device/pnp.h> #include <stdint.h> #include "it8671f.h" diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h index 4b1ab420d0..5fe74bccba 100644 --- a/src/superio/ite/it8671f/it8671f.h +++ b/src/superio/ite/it8671f/it8671f.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_ITE_IT8671F_H #define SUPERIO_ITE_IT8671F_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> /* Datasheet: Not available online, got it from ITE per request. */ diff --git a/src/superio/ite/it8718f/early_serial.c b/src/superio/ite/it8718f/early_serial.c index 915e10b7d3..74233c4fc1 100644 --- a/src/superio/ite/it8718f/early_serial.c +++ b/src/superio/ite/it8718f/early_serial.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/pnp_type.h> #include <superio/ite/common/ite.h> #include "it8718f.h" diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h index 898599775c..ebf8c4cae2 100644 --- a/src/superio/ite/it8718f/it8718f.h +++ b/src/superio/ite/it8718f/it8718f.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_ITE_IT8718F_H #define SUPERIO_ITE_IT8718F_H -#include <arch/io.h> +#include <device/pnp_type.h> /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8718_2.asp */ diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c index b299d6da2f..95be01c111 100644 --- a/src/superio/ite/it8772f/early_init.c +++ b/src/superio/ite/it8772f/early_init.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include "it8772f.h" diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h index 91d107a9a2..14d76acc77 100644 --- a/src/superio/ite/it8772f/it8772f.h +++ b/src/superio/ite/it8772f/it8772f.h @@ -126,7 +126,7 @@ enum thermal_mode { /* GPIO Mode: 0: input mode, 1: output mode */ #define GPIO_REG_OUTPUT(x) (0xc8 + (x)) -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> u8 it8772f_sio_read(pnp_devfn_t dev, u8 reg); diff --git a/src/superio/nsc/common/early_serial.c b/src/superio/nsc/common/early_serial.c index 2cd9f050cf..0ac146f0aa 100644 --- a/src/superio/nsc/common/early_serial.c +++ b/src/superio/nsc/common/early_serial.c @@ -17,7 +17,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include <stdint.h> #include "nsc.h" diff --git a/src/superio/nsc/common/nsc.h b/src/superio/nsc/common/nsc.h index 76112dc4fa..c2d732c491 100644 --- a/src/superio/nsc/common/nsc.h +++ b/src/superio/nsc/common/nsc.h @@ -20,6 +20,7 @@ #include <device/pnp_def.h> #include <stdint.h> +#include <device/pnp_type.h> void nsc_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/nsc/pc87417/early_init.c b/src/superio/nsc/pc87417/early_init.c index c7ed11ce6c..eab4126778 100644 --- a/src/superio/nsc/pc87417/early_init.c +++ b/src/superio/nsc/pc87417/early_init.c @@ -17,6 +17,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "pc87417.h" diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h index b50a920687..25401e4617 100644 --- a/src/superio/nsc/pc87417/pc87417.h +++ b/src/superio/nsc/pc87417/pc87417.h @@ -110,7 +110,7 @@ #define PC87417_XSCNF 0x15 #define PC87417_XWBCNF 0x16 -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void pc87417_disable_dev(pnp_devfn_t dev); diff --git a/src/superio/nsc/pc97317/early_serial.c b/src/superio/nsc/pc97317/early_serial.c index f13f98bd5f..74489faf37 100644 --- a/src/superio/nsc/pc97317/early_serial.c +++ b/src/superio/nsc/pc97317/early_serial.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "pc97317.h" diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h index 1d82817518..76717fa0df 100644 --- a/src/superio/nsc/pc97317/pc97317.h +++ b/src/superio/nsc/pc97317/pc97317.h @@ -27,7 +27,7 @@ #define PC97317_GPIO 0x07 #define PC97317_PM 0x08 /* Power Management */ -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index 380046f841..9b5c2d3759 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -36,6 +36,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "nuvoton.h" diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h index 4cb2b6f48e..688364a0d2 100644 --- a/src/superio/nuvoton/common/nuvoton.h +++ b/src/superio/nuvoton/common/nuvoton.h @@ -18,7 +18,7 @@ #ifndef SUPERIO_NUVOTON_COMMON_PRE_RAM_H #define SUPERIO_NUVOTON_COMMON_PRE_RAM_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev); diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/nct5104d/early_init.c index 294f0ce60e..3559aba460 100644 --- a/src/superio/nuvoton/nct5104d/early_init.c +++ b/src/superio/nuvoton/nct5104d/early_init.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_type.h> #include <device/pnp.h> #include <stdint.h> #include "nct5104d.h" diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h index 055c5dac9d..707e94a90f 100644 --- a/src/superio/nuvoton/nct5104d/nct5104d.h +++ b/src/superio/nuvoton/nct5104d/nct5104d.h @@ -18,6 +18,8 @@ #ifndef SUPERIO_NUVOTON_NCT5104D_H #define SUPERIO_NUVOTON_NCT5104D_H +#include <device/pnp_type.h> + /* SIO global configuration */ #define IRQ_TYPE_SEL_CR10 0x10 /* UARTA,UARTB */ #define IRQ_TYPE_SEL_CR11 0x11 /* SMI,UARTC,UARTD,WDTO */ diff --git a/src/superio/nuvoton/wpcm450/early_init.c b/src/superio/nuvoton/wpcm450/early_init.c index 2a3bf02d77..0ed5ac338b 100644 --- a/src/superio/nuvoton/wpcm450/early_init.c +++ b/src/superio/nuvoton/wpcm450/early_init.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include "wpcm450.h" diff --git a/src/superio/serverengines/pilot/early_init.c b/src/superio/serverengines/pilot/early_init.c index 82438e4cc3..3509fb47ec 100644 --- a/src/superio/serverengines/pilot/early_init.c +++ b/src/superio/serverengines/pilot/early_init.c @@ -19,7 +19,7 @@ #define BLUBB_DEV PNP_DEV(port, 0x04) -#include <arch/io.h> +#include <device/pnp_ops.h> #include <console/console.h> #include <device/pnp.h> #include "pilot.h" diff --git a/src/superio/serverengines/pilot/early_serial.c b/src/superio/serverengines/pilot/early_serial.c index 21f7adf4c1..555e4f5156 100644 --- a/src/superio/serverengines/pilot/early_serial.c +++ b/src/superio/serverengines/pilot/early_serial.c @@ -18,6 +18,7 @@ /* PILOT Super I/O is only based on LPC observation done on factory system. */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include "pilot.h" diff --git a/src/superio/serverengines/pilot/pilot.h b/src/superio/serverengines/pilot/pilot.h index ab9b9c8d4e..a88f0e6066 100644 --- a/src/superio/serverengines/pilot/pilot.h +++ b/src/superio/serverengines/pilot/pilot.h @@ -18,6 +18,8 @@ #ifndef SUPERIO_SERVERENGINES_PILOT_PILOT_H #define SUPERIO_SERVERENGINES_PILOT_PILOT_H +#include <device/pnp_type.h> + /* PILOT Super I/O is only based on LPC observation done on factory system. */ #define PILOT_LD1 0x01 /* Logical device 1 */ diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h index 3a5683bf12..f40cc35488 100644 --- a/src/superio/smsc/dme1737/dme1737.h +++ b/src/superio/smsc/dme1737/dme1737.h @@ -26,7 +26,7 @@ #define DME1737_KBC 7 /* Keyboard & Mouse */ #define DME1737_RT 10 /* Runtime reg*/ -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c index 00813a0fc4..58ad177641 100644 --- a/src/superio/smsc/dme1737/early_serial.c +++ b/src/superio/smsc/dme1737/early_serial.c @@ -17,6 +17,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "dme1737.h" diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c index 658de9b654..fc3604372e 100644 --- a/src/superio/smsc/kbc1100/early_init.c +++ b/src/superio/smsc/kbc1100/early_init.c @@ -17,6 +17,7 @@ /* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h index 41d70e5157..8531643b33 100644 --- a/src/superio/smsc/kbc1100/kbc1100.h +++ b/src/superio/smsc/kbc1100/kbc1100.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_SMSC_KBC1100_H #define SUPERIO_SMSC_KBC1100_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> #define KBC1100_PM1 1 /* PM1 */ diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c index a6bf9917f0..26fdfafbc6 100644 --- a/src/superio/smsc/lpc47b272/early_serial.c +++ b/src/superio/smsc/lpc47b272/early_serial.c @@ -17,6 +17,7 @@ /* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "lpc47b272.h" diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h index d1f5f74944..3fbd043364 100644 --- a/src/superio/smsc/lpc47b272/lpc47b272.h +++ b/src/superio/smsc/lpc47b272/lpc47b272.h @@ -26,7 +26,7 @@ #define LPC47B272_MAX_CONFIG_REGISTER 0x5F -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c index a3d03810bf..a07cd99d32 100644 --- a/src/superio/smsc/lpc47b397/early_serial.c +++ b/src/superio/smsc/lpc47b397/early_serial.c @@ -17,6 +17,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "lpc47b397.h" diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h index 43fc624b9f..5f3a5045ab 100644 --- a/src/superio/smsc/lpc47b397/lpc47b397.h +++ b/src/superio/smsc/lpc47b397/lpc47b397.h @@ -27,7 +27,7 @@ #define LPC47B397_HWM 8 /* HW Monitor */ #define LPC47B397_RT 10 /* Runtime reg*/ -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c index 6f165b427b..96c0b5df67 100644 --- a/src/superio/smsc/lpc47m10x/early_serial.c +++ b/src/superio/smsc/lpc47m10x/early_serial.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "lpc47m10x.h" diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h index 3a3bf96bd7..a83a6f242e 100644 --- a/src/superio/smsc/lpc47m10x/lpc47m10x.h +++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h @@ -30,7 +30,7 @@ #define LPC47M10X2_MAX_CONFIG_REGISTER 0x5F -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c index 7e668eadda..aab603bc9e 100644 --- a/src/superio/smsc/lpc47m15x/early_serial.c +++ b/src/superio/smsc/lpc47m15x/early_serial.c @@ -16,6 +16,7 @@ /* Pre-RAM driver for the SMSC LPC47M15X Super I/O chip */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x.h b/src/superio/smsc/lpc47m15x/lpc47m15x.h index 179b5c0daf..e905e9a843 100644 --- a/src/superio/smsc/lpc47m15x/lpc47m15x.h +++ b/src/superio/smsc/lpc47m15x/lpc47m15x.h @@ -27,7 +27,7 @@ #define LPC47M15X2_MAX_CONFIG_REGISTER 0x5F -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c index f9ff04e28f..5fb8d7fcdb 100644 --- a/src/superio/smsc/lpc47n217/early_serial.c +++ b/src/superio/smsc/lpc47n217/early_serial.c @@ -17,6 +17,7 @@ /* Pre-RAM driver for SMSC LPC47N217 Super I/O chip. */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <assert.h> #include "lpc47n217.h" diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h index 1cae5a08b2..13b9bf3697 100644 --- a/src/superio/smsc/lpc47n217/lpc47n217.h +++ b/src/superio/smsc/lpc47n217/lpc47n217.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_SMSC_LPC47N217_LPC47N217_H #define SUPERIO_SMSC_LPC47N217_LPC47N217_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> /* diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c index 4ae1fb76af..c02b8506d1 100644 --- a/src/superio/smsc/lpc47n227/early_serial.c +++ b/src/superio/smsc/lpc47n227/early_serial.c @@ -17,6 +17,7 @@ /* Pre-RAM driver for SMSC LPC47N227 Super I/O chip. */ #include <arch/io.h> +#include <device/pnp_ops.h> #include "lpc47n227.h" void pnp_enter_conf_state(pnp_devfn_t dev) diff --git a/src/superio/smsc/lpc47n227/lpc47n227.h b/src/superio/smsc/lpc47n227/lpc47n227.h index d629a67d2d..5e30f65f01 100644 --- a/src/superio/smsc/lpc47n227/lpc47n227.h +++ b/src/superio/smsc/lpc47n227/lpc47n227.h @@ -16,6 +16,8 @@ #ifndef SUPERIO_SMSC_LPC47N227_LPC47N227_H #define SUPERIO_SMSC_LPC47N227_LPC47N227_H +#include <device/pnp_type.h> + /* * Since the LPC47N227 does not have logical devices but a flat configuration * space, these are arbitrary, but must match declarations in the mainboard diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c index 0ebd2071eb..a416ab8358 100644 --- a/src/superio/smsc/sch4037/sch4037_early_init.c +++ b/src/superio/smsc/sch4037/sch4037_early_init.c @@ -15,6 +15,7 @@ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h index 683dcd113e..610beba59c 100644 --- a/src/superio/smsc/sio1036/sio1036.h +++ b/src/superio/smsc/sio1036/sio1036.h @@ -22,7 +22,7 @@ #define LPT_POWER_DOWN (1 << 2) #define IR_OUTPUT_MUX (1 << 6) -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase); diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c index 1f2c9f2e5c..47f317f042 100644 --- a/src/superio/smsc/sio1036/sio1036_early_init.c +++ b/src/superio/smsc/sio1036/sio1036_early_init.c @@ -16,6 +16,7 @@ /* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <stdint.h> #include "sio1036.h" diff --git a/src/superio/smsc/smscsuperio/early_serial.c b/src/superio/smsc/smscsuperio/early_serial.c index 27e3ef266c..f058564ee6 100644 --- a/src/superio/smsc/smscsuperio/early_serial.c +++ b/src/superio/smsc/smscsuperio/early_serial.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include <stdint.h> diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h index 9e088b8687..c42328c09b 100644 --- a/src/superio/smsc/smscsuperio/smscsuperio.h +++ b/src/superio/smsc/smscsuperio/smscsuperio.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_SMSC_SMSCSUPERIO_H #define SUPERIO_SMSC_SMSCSUPERIO_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> /* All known/supported SMSC Super I/Os have the same logical device IDs diff --git a/src/superio/winbond/common/early_init.c b/src/superio/winbond/common/early_init.c index 7c3ce2b3a5..b1b8c27693 100644 --- a/src/superio/winbond/common/early_init.c +++ b/src/superio/winbond/common/early_init.c @@ -34,6 +34,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp.h> #include <stdint.h> #include "winbond.h" diff --git a/src/superio/winbond/common/winbond.h b/src/superio/winbond/common/winbond.h index e8b5c259d0..29bfbf5ab3 100644 --- a/src/superio/winbond/common/winbond.h +++ b/src/superio/winbond/common/winbond.h @@ -17,7 +17,7 @@ #ifndef SUPERIO_WINBOND_COMMON_PRE_RAM_H #define SUPERIO_WINBOND_COMMON_PRE_RAM_H -#include <arch/io.h> +#include <device/pnp_type.h> #include <stdint.h> void winbond_enable_serial(pnp_devfn_t dev, uint16_t iobase); diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c index 7ec6abec6b..4bea6785fe 100644 --- a/src/superio/winbond/w83627dhg/early_serial.c +++ b/src/superio/winbond/w83627dhg/early_serial.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pnp_ops.h> #include <stdint.h> #include "w83627dhg.h" diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h index 53704370cb..004d5e8abb 100644 --- a/src/superio/winbond/w83627dhg/w83627dhg.h +++ b/src/superio/winbond/w83627dhg/w83627dhg.h @@ -18,7 +18,7 @@ #ifndef SUPERIO_WINBOND_W83627DHG_H #define SUPERIO_WINBOND_W83627DHG_H -#include <arch/io.h> +#include <device/pnp_type.h> #define W83627DHG_FDC 0 /* Floppy */ #define W83627DHG_PP 1 /* Parallel port */ diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h index acea3826e9..d254e53c09 100644 --- a/src/superio/winbond/w83627thg/w83627thg.h +++ b/src/superio/winbond/w83627thg/w83627thg.h @@ -19,7 +19,7 @@ #ifndef SUPERIO_WINBOND_W83627THG_W83627THG_H #define SUPERIO_WINBOND_W83627THG_W83627THG_H -#include <arch/io.h> +#include <device/pnp_type.h> #define W83627THG_FDC 0 /* Floppy */ #define W83627THG_PP 1 /* Parallel port */ diff --git a/src/superio/winbond/wpcd376i/early_serial.c b/src/superio/winbond/wpcd376i/early_serial.c index 115e097492..9f9ff6b227 100644 --- a/src/superio/winbond/wpcd376i/early_serial.c +++ b/src/superio/winbond/wpcd376i/early_serial.c @@ -17,7 +17,7 @@ /* Pre-RAM driver for the Winbond WPCD376I Super I/O chip. */ -#include <arch/io.h> +#include <device/pnp_ops.h> #include <device/pnp_def.h> #include "wpcd376i.h" diff --git a/src/superio/winbond/wpcd376i/wpcd376i.h b/src/superio/winbond/wpcd376i/wpcd376i.h index 4bb9289581..a90b13bad7 100644 --- a/src/superio/winbond/wpcd376i/wpcd376i.h +++ b/src/superio/winbond/wpcd376i/wpcd376i.h @@ -18,7 +18,7 @@ #ifndef SUPERIO_WINBOND_WPCD376I_WPCD376I_H #define SUPERIO_WINBOND_WPCD376I_WPCD376I_H -#include <arch/io.h> +#include <device/pnp_type.h> /* Logical Device Numbers (LDN). */ #define WPCD376I_FDC 0x00 /* Floppy */ |