summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c20
1 files changed, 1 insertions, 19 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index f67d1e45f9..5f0dd8c299 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -460,18 +460,6 @@ static void pch_fixups(struct device *dev)
RCBA32_OR(LCTL, 0x3);
}
-static void pch_decode_init(struct device *dev)
-{
- config_t *config = dev->chip_info;
-
- printk(BIOS_DEBUG, "pch_decode_init\n");
-
- pci_write_config32(dev, LPC_GEN1_DEC, config->gen1_dec);
- pci_write_config32(dev, LPC_GEN2_DEC, config->gen2_dec);
- pci_write_config32(dev, LPC_GEN3_DEC, config->gen3_dec);
- pci_write_config32(dev, LPC_GEN4_DEC, config->gen4_dec);
-}
-
static void pch_spi_init(const struct device *const dev)
{
const config_t *const config = dev->chip_info;
@@ -681,12 +669,6 @@ static void pch_lpc_read_resources(struct device *dev)
}
}
-static void pch_lpc_enable_resources(struct device *dev)
-{
- pch_decode_init(dev);
- return pci_dev_enable_resources(dev);
-}
-
static void pch_lpc_enable(struct device *dev)
{
/* Enable PCH Display Port */
@@ -910,7 +892,7 @@ static struct pci_operations pci_ops = {
static struct device_operations device_ops = {
.read_resources = pch_lpc_read_resources,
.set_resources = pci_dev_set_resources,
- .enable_resources = pch_lpc_enable_resources,
+ .enable_resources = pci_dev_enable_resources,
.write_acpi_tables = acpi_write_hpet,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,