diff options
| -rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/usb_debug.c | 16 |
2 files changed, 11 insertions, 7 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index e921bc1d72..bc3ff4bbdf 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -40,7 +40,9 @@ ramstage-y += watchdog.c ramstage-$(CONFIG_ELOG) += elog.c ramstage-y += spi.c +ramstage-$(CONFIG_USBDEBUG) += usb_debug.c smm-$(CONFIG_SPI_FLASH_SMM) += spi.c +smm-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c diff --git a/src/southbridge/intel/bd82x6x/usb_debug.c b/src/southbridge/intel/bd82x6x/usb_debug.c index 1cee353e2d..607a88c6c0 100644 --- a/src/southbridge/intel/bd82x6x/usb_debug.c +++ b/src/southbridge/intel/bd82x6x/usb_debug.c @@ -19,18 +19,13 @@ #include <stdint.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <usbdebug.h> #include <device/pci_def.h> #include "pch.h" -/* Required for successful build, but currently empty. */ -void set_debug_port(unsigned int port) -{ - /* Not needed, the ICH* southbridges hardcode physical USB port 1. */ -} - +#ifdef __PRE_RAM__ +#include <arch/romcc_io.h> void enable_usbdebug(unsigned int port) { u32 dbgctl; @@ -48,4 +43,11 @@ void enable_usbdebug(unsigned int port) dbgctl |= (1 << 30); write32(CONFIG_EHCI_BAR + CONFIG_EHCI_DEBUG_OFFSET, dbgctl); } +#endif /* __PRE_RAM__ */ + +/* Required for successful build, but currently empty. */ +void set_debug_port(unsigned int port) +{ + /* Not needed, the ICH* southbridges hardcode physical USB port 1. */ +} |