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-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c18
-rw-r--r--util/autoport/bd82x6x.go11
2 files changed, 14 insertions, 15 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 17f824c87d..1106912830 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -859,12 +859,18 @@ static struct device_operations device_ops = {
* Intel C200 Series Chipset
*/
-static const unsigned short pci_device_ids[] = { 0x1c46, 0x1c47, 0x1c49, 0x1c4a,
- 0x1c4b, 0x1c4c, 0x1c4d, 0x1c4e,
- 0x1c4f, 0x1c50, 0x1c52, 0x1c54,
- 0x1e55, 0x1c56, 0x1e57, 0x1c5c,
- 0x1e5d, 0x1e5e, 0x1e5f, 0x1e49,
- 0 };
+static const unsigned short pci_device_ids[] = {
+ 0x1c40, 0x1c41, 0x1c42, 0x1c43, 0x1c44, 0x1c45, 0x1c46, 0x1c47, 0x1c48,
+ 0x1c49, 0x1c4a, 0x1c4b, 0x1c4c, 0x1c4d, 0x1c4e, 0x1c4f, 0x1c50, 0x1c51,
+ 0x1c52, 0x1c53, 0x1c54, 0x1c55, 0x1c56, 0x1c57, 0x1c58, 0x1c59, 0x1c5a,
+ 0x1c5b, 0x1c5c, 0x1c5d, 0x1c5e, 0x1c5f,
+
+ 0x1e41, 0x1e42, 0x1e43, 0x1e44, 0x1e45, 0x1e46, 0x1e47, 0x1e48, 0x1e49,
+ 0x1e4a, 0x1e4b, 0x1e4c, 0x1e4d, 0x1e4e, 0x1e4f, 0x1e50, 0x1e51, 0x1e52,
+ 0x1e53, 0x1e54, 0x1e55, 0x1e56, 0x1e57, 0x1e58, 0x1e59, 0x1e5a, 0x1e5b,
+ 0x1e5c, 0x1e5d, 0x1e5e, 0x1e5f,
+
+ 0 };
static const struct pci_driver pch_lpc __pci_driver = {
.ops = &device_ops,
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
index 8756d0751d..a1513e8b0d 100644
--- a/util/autoport/bd82x6x.go
+++ b/util/autoport/bd82x6x.go
@@ -396,19 +396,12 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
func init() {
/* BD82X6X LPC */
- for _, id := range []uint16{
- 0x1c46, 0x1c47, 0x1c49, 0x1c4a,
- 0x1c4b, 0x1c4c, 0x1c4d, 0x1c4e,
- 0x1c4f, 0x1c50, 0x1c52, 0x1c54,
- 0x1c56, 0x1c5c,
- } {
+ for id := 0x1c40; id <= 0x1c5f; id++ {
RegisterPCI(0x8086, id, bd82x6x{variant: "BD82X6X"})
}
/* C216 LPC */
- for _, id := range []uint16{
- 0x1e55, 0x1e57, 0x1e5d, 0x1e5e, 0x1e5f, 0x1e49,
- } {
+ for id := 0x1e41; id <= 0x1e5f; id++ {
RegisterPCI(0x8086, id, bd82x6x{variant: "C216"})
}