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-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 9ecbf00152..2056dd6280 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -28,6 +28,7 @@ chip soc/intel/cannonlake
register "PchPmSlpAMinAssert" = "4" # 2s
register "speed_shift_enable" = "1"
+ register "psys_pmax" = "140"
register "s0ix_enable" = "1"
register "dptf_enable" = "1"
register "dmipwroptimize" = "1"