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-rw-r--r--payloads/libpayload/arch/arm/exception_asm.S16
-rw-r--r--payloads/libpayload/arch/arm/head.S10
-rw-r--r--payloads/libpayload/arch/arm/memcpy.S2
-rw-r--r--payloads/libpayload/arch/arm/memmove.S2
-rw-r--r--payloads/libpayload/arch/arm/memset.S3
-rw-r--r--payloads/libpayload/include/arm/arch/asm.h6
-rw-r--r--src/arch/arm/armv4/bootblock.S1
-rw-r--r--src/arch/arm/armv7/bootblock.S1
-rw-r--r--src/arch/arm/armv7/exception_asm.S16
-rw-r--r--src/arch/arm/bootblock.ld4
-rw-r--r--src/arch/arm/include/arch/asm.h6
-rw-r--r--src/arch/arm/libgcc/ashldi3.S6
-rw-r--r--src/arch/arm/libgcc/lib1funcs.S12
-rw-r--r--src/arch/arm/libgcc/lshrdi3.S6
-rw-r--r--src/arch/arm/libgcc/muldi3.S6
-rw-r--r--src/arch/arm/memcpy.S2
-rw-r--r--src/arch/arm/memmove.S2
-rw-r--r--src/arch/arm/memset.S3
-rw-r--r--src/soc/nvidia/tegra124/bootblock_asm.S1
-rw-r--r--src/soc/nvidia/tegra124/maincpu.S20
20 files changed, 59 insertions, 66 deletions
diff --git a/payloads/libpayload/arch/arm/exception_asm.S b/payloads/libpayload/arch/arm/exception_asm.S
index 31d759335f..1f369bcc05 100644
--- a/payloads/libpayload/arch/arm/exception_asm.S
+++ b/payloads/libpayload/arch/arm/exception_asm.S
@@ -27,13 +27,7 @@
* SUCH DAMAGE.
*/
- .global exception_stack_end
-exception_stack_end:
- .word 0
-
-exception_handler:
- .word 0
-
+ .text
.align 6
.arm
@@ -88,6 +82,7 @@ exception_common:
ldmfd sp!, { pc }^
+ .align 2
_undefined_instruction: .word exception_undefined_instruction
_software_interrupt: .word exception_software_interrupt
_prefetch_abort: .word exception_prefetch_abort
@@ -96,6 +91,13 @@ _not_used: .word exception_not_used
_irq: .word exception_irq
_fiq: .word exception_fiq
+ .global exception_stack_end
+exception_stack_end:
+ .word 0
+
+exception_handler:
+ .word 0
+
.thumb
.global set_vbar
.thumb_func
diff --git a/payloads/libpayload/arch/arm/head.S b/payloads/libpayload/arch/arm/head.S
index 0d23c7256f..54fdb5defd 100644
--- a/payloads/libpayload/arch/arm/head.S
+++ b/payloads/libpayload/arch/arm/head.S
@@ -29,10 +29,6 @@
#include <arch/asm.h>
-1:
-.align 4
-.word _stack
-
/*
* Our entry point
*/
@@ -43,7 +39,7 @@ ENTRY(_entry)
/* TODO: Clear BSS */
/* Setup new stack */
- ldr sp, 1b
+ ldr sp, 1f
/* TODO: Save old stack pointer and link register */
@@ -57,3 +53,7 @@ ENTRY(_entry)
/* Return to the original context. */
bx lr
ENDPROC(_entry)
+
+.align 4
+1:
+.word _stack
diff --git a/payloads/libpayload/arch/arm/memcpy.S b/payloads/libpayload/arch/arm/memcpy.S
index b8f857bb56..1388d05ad9 100644
--- a/payloads/libpayload/arch/arm/memcpy.S
+++ b/payloads/libpayload/arch/arm/memcpy.S
@@ -52,8 +52,6 @@
ldmfd sp!, {r0, \reg1, \reg2}
.endm
- .text
-
/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
ENTRY(memcpy)
diff --git a/payloads/libpayload/arch/arm/memmove.S b/payloads/libpayload/arch/arm/memmove.S
index dc29f7458c..bd5f8f1ac5 100644
--- a/payloads/libpayload/arch/arm/memmove.S
+++ b/payloads/libpayload/arch/arm/memmove.S
@@ -13,8 +13,6 @@
#include <arch/asm.h>
#include "asmlib.h"
- .text
-
/*
* Prototype: void *memmove(void *dest, const void *src, size_t n);
*
diff --git a/payloads/libpayload/arch/arm/memset.S b/payloads/libpayload/arch/arm/memset.S
index 945767c599..0c1102deb4 100644
--- a/payloads/libpayload/arch/arm/memset.S
+++ b/payloads/libpayload/arch/arm/memset.S
@@ -13,9 +13,6 @@
#include <arch/asm.h>
#include "asmlib.h"
- .text
- .align 5
-
ENTRY(memset)
ands r3, r0, #3 @ 1 unaligned?
mov ip, r0 @ preserve r0 as return value
diff --git a/payloads/libpayload/include/arm/arch/asm.h b/payloads/libpayload/include/arm/arch/asm.h
index 9e9e7ceff4..7bf2aa8974 100644
--- a/payloads/libpayload/include/arm/arch/asm.h
+++ b/payloads/libpayload/include/arm/arch/asm.h
@@ -40,16 +40,14 @@
END(name)
#define ENTRY(name) \
- .globl name; \
+ .section .text.name, "ax", %progbits; \
+ .global name; \
ALIGN; \
name:
#define END(name) \
.size name, .-name
-/* Everything should go into the text section by default. */
- .text
-
/* Thumb code uses the (new) unified assembly syntax. */
THUMB( .syntax unified )
diff --git a/src/arch/arm/armv4/bootblock.S b/src/arch/arm/armv4/bootblock.S
index 58a34cff7e..e4d43029fe 100644
--- a/src/arch/arm/armv4/bootblock.S
+++ b/src/arch/arm/armv4/bootblock.S
@@ -31,7 +31,6 @@
#include <arch/asm.h>
-.section ".start", "a", %progbits
ENTRY(_start)
/*
* Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
diff --git a/src/arch/arm/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S
index 9ed5d543aa..a15d1672ca 100644
--- a/src/arch/arm/armv7/bootblock.S
+++ b/src/arch/arm/armv7/bootblock.S
@@ -31,7 +31,6 @@
#include <arch/asm.h>
-.section ".start", "a", %progbits
.arm
ENTRY(_start)
/*
diff --git a/src/arch/arm/armv7/exception_asm.S b/src/arch/arm/armv7/exception_asm.S
index dd456363e9..1f369bcc05 100644
--- a/src/arch/arm/armv7/exception_asm.S
+++ b/src/arch/arm/armv7/exception_asm.S
@@ -27,13 +27,7 @@
* SUCH DAMAGE.
*/
- .global exception_stack_end
-exception_stack_end:
- .word 0
-
-exception_handler:
- .word 0
-
+ .text
.align 6
.arm
@@ -88,6 +82,7 @@ exception_common:
ldmfd sp!, { pc }^
+ .align 2
_undefined_instruction: .word exception_undefined_instruction
_software_interrupt: .word exception_software_interrupt
_prefetch_abort: .word exception_prefetch_abort
@@ -96,6 +91,13 @@ _not_used: .word exception_not_used
_irq: .word exception_irq
_fiq: .word exception_fiq
+ .global exception_stack_end
+exception_stack_end:
+ .word 0
+
+exception_handler:
+ .word 0
+
.thumb
.global set_vbar
.thumb_func
diff --git a/src/arch/arm/bootblock.ld b/src/arch/arm/bootblock.ld
index 2b04b22475..8d05c7b5a5 100644
--- a/src/arch/arm/bootblock.ld
+++ b/src/arch/arm/bootblock.ld
@@ -35,7 +35,7 @@ SECTIONS
. = CONFIG_BOOTBLOCK_BASE;
.bootblock . : {
- *(.start);
+ *(.text._start);
KEEP(*(.id));
*(.text);
*(.text.*);
@@ -56,4 +56,4 @@ SECTIONS
*(.note.*)
*(.ARM.*)
}
-} \ No newline at end of file
+}
diff --git a/src/arch/arm/include/arch/asm.h b/src/arch/arm/include/arch/asm.h
index a57ce4dafa..420fa602a6 100644
--- a/src/arch/arm/include/arch/asm.h
+++ b/src/arch/arm/include/arch/asm.h
@@ -43,16 +43,14 @@
END(name)
#define ENTRY(name) \
- .globl name; \
+ .section .text.name, "ax", %progbits; \
+ .global name; \
ALIGN; \
name:
#define END(name) \
.size name, .-name
-/* Everything should go into the text section by default. */
- .text
-
/* Thumb code uses the (new) unified assembly syntax. */
THUMB( .syntax unified )
diff --git a/src/arch/arm/libgcc/ashldi3.S b/src/arch/arm/libgcc/ashldi3.S
index bf7e7e75c4..3009f18b83 100644
--- a/src/arch/arm/libgcc/ashldi3.S
+++ b/src/arch/arm/libgcc/ashldi3.S
@@ -39,7 +39,8 @@ Boston, MA 02110-1301, USA. */
#endif
ENTRY(__ashldi3)
-ENTRY(__aeabi_llsl)
+.global __aeabi_llsl
+__aeabi_llsl:
subs r3, r2, #32
rsb ip, r2, #32
@@ -51,7 +52,8 @@ ENTRY(__aeabi_llsl)
mov al, al, lsl r2
mov pc, lr
+.type __aeabi_llsl, %function
+.size __aeabi_llsl, .-__aeabi_llsl
ENDPROC(__ashldi3)
-ENDPROC(__aeabi_llsl)
#endif
diff --git a/src/arch/arm/libgcc/lib1funcs.S b/src/arch/arm/libgcc/lib1funcs.S
index 533c369d6e..f78a937afc 100644
--- a/src/arch/arm/libgcc/lib1funcs.S
+++ b/src/arch/arm/libgcc/lib1funcs.S
@@ -206,7 +206,8 @@ Boston, MA 02111-1307, USA. */
ENTRY(__udivsi3)
-ENTRY(__aeabi_uidiv)
+.global __aeabi_uidiv
+__aeabi_uidiv:
subs r2, r1, #1
moveq pc, lr
@@ -230,8 +231,9 @@ ENTRY(__aeabi_uidiv)
mov r0, r0, lsr r2
mov pc, lr
+.type __aeabi_uidiv, %function
+.size __aeabi_uidiv, .-__aeabi_uidiv
ENDPROC(__udivsi3)
-ENDPROC(__aeabi_uidiv)
ENTRY(__umodsi3)
@@ -250,7 +252,8 @@ ENTRY(__umodsi3)
ENDPROC(__umodsi3)
ENTRY(__divsi3)
-ENTRY(__aeabi_idiv)
+.global __aeabi_idiv
+__aeabi_idiv:
cmp r1, #0
eor ip, r0, r1 @ save the sign of the result.
@@ -287,8 +290,9 @@ ENTRY(__aeabi_idiv)
rsbmi r0, r0, #0
mov pc, lr
+.type __aeabi_idiv, %function
+.size __aeabi_idiv, .-__aeabi_idiv
ENDPROC(__divsi3)
-ENDPROC(__aeabi_idiv)
ENTRY(__modsi3)
diff --git a/src/arch/arm/libgcc/lshrdi3.S b/src/arch/arm/libgcc/lshrdi3.S
index 5a5809a17e..7af0c83123 100644
--- a/src/arch/arm/libgcc/lshrdi3.S
+++ b/src/arch/arm/libgcc/lshrdi3.S
@@ -39,7 +39,8 @@ Boston, MA 02110-1301, USA. */
#endif
ENTRY(__lshrdi3)
-ENTRY(__aeabi_llsr)
+.global __aeabi_llsr
+__aeabi_llsr:
subs r3, r2, #32
rsb ip, r2, #32
@@ -51,7 +52,8 @@ ENTRY(__aeabi_llsr)
mov ah, ah, lsr r2
mov pc, lr
+.type __aeabi_llsr, %function
+.size __aeabi_llsr, .-__aeabi_llsr
ENDPROC(__lshrdi3)
-ENDPROC(__aeabi_llsr)
#endif
diff --git a/src/arch/arm/libgcc/muldi3.S b/src/arch/arm/libgcc/muldi3.S
index f6a40a8dc2..652dacab26 100644
--- a/src/arch/arm/libgcc/muldi3.S
+++ b/src/arch/arm/libgcc/muldi3.S
@@ -27,7 +27,8 @@
#endif
ENTRY(__muldi3)
-ENTRY(__aeabi_lmul)
+.global __aeabi_lmul
+__aeabi_lmul:
mul xh, yl, xh
mla xh, xl, yh, xh
@@ -45,7 +46,8 @@ ENTRY(__aeabi_lmul)
adc xh, xh, ip, lsr #16
mov pc, lr
+.type __aeabi_lmul, %function
+.size __aeabi_lmul, .-__aeabi_lmul
ENDPROC(__muldi3)
-ENDPROC(__aeabi_lmul)
#endif
diff --git a/src/arch/arm/memcpy.S b/src/arch/arm/memcpy.S
index b8f857bb56..1388d05ad9 100644
--- a/src/arch/arm/memcpy.S
+++ b/src/arch/arm/memcpy.S
@@ -52,8 +52,6 @@
ldmfd sp!, {r0, \reg1, \reg2}
.endm
- .text
-
/* Prototype: void *memcpy(void *dest, const void *src, size_t n); */
ENTRY(memcpy)
diff --git a/src/arch/arm/memmove.S b/src/arch/arm/memmove.S
index dc29f7458c..bd5f8f1ac5 100644
--- a/src/arch/arm/memmove.S
+++ b/src/arch/arm/memmove.S
@@ -13,8 +13,6 @@
#include <arch/asm.h>
#include "asmlib.h"
- .text
-
/*
* Prototype: void *memmove(void *dest, const void *src, size_t n);
*
diff --git a/src/arch/arm/memset.S b/src/arch/arm/memset.S
index 945767c599..0c1102deb4 100644
--- a/src/arch/arm/memset.S
+++ b/src/arch/arm/memset.S
@@ -13,9 +13,6 @@
#include <arch/asm.h>
#include "asmlib.h"
- .text
- .align 5
-
ENTRY(memset)
ands r3, r0, #3 @ 1 unaligned?
mov ip, r0 @ preserve r0 as return value
diff --git a/src/soc/nvidia/tegra124/bootblock_asm.S b/src/soc/nvidia/tegra124/bootblock_asm.S
index 58a34cff7e..e4d43029fe 100644
--- a/src/soc/nvidia/tegra124/bootblock_asm.S
+++ b/src/soc/nvidia/tegra124/bootblock_asm.S
@@ -31,7 +31,6 @@
#include <arch/asm.h>
-.section ".start", "a", %progbits
ENTRY(_start)
/*
* Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
diff --git a/src/soc/nvidia/tegra124/maincpu.S b/src/soc/nvidia/tegra124/maincpu.S
index 91981ac1ca..11367480ad 100644
--- a/src/soc/nvidia/tegra124/maincpu.S
+++ b/src/soc/nvidia/tegra124/maincpu.S
@@ -29,16 +29,6 @@
#include <arch/asm.h>
- .align 2
-
- .global maincpu_stack_pointer
-maincpu_stack_pointer:
- .word 0
-
- .global maincpu_entry_point
-maincpu_entry_point:
- .word 0
-
.arm
ENTRY(maincpu_setup)
/*
@@ -54,3 +44,13 @@ ENTRY(maincpu_setup)
ldr r0, maincpu_entry_point
bx r0
ENDPROC(maincpu_setup)
+
+ .align 2
+
+ .global maincpu_stack_pointer
+maincpu_stack_pointer:
+ .word 0
+
+ .global maincpu_entry_point
+maincpu_entry_point:
+ .word 0