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-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index b4e6a0236b..eed67b762e 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -33,6 +33,9 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
+ # Set @0x280-0x2ff I/O Range for SuperIO HWM
+ register "gen1_dec" = "0x007c0281"
+
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"