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-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 434bfebc18..48375e451d 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -26,6 +26,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <device/pci_def.h>
+#include <pc80/mc146818rtc.h>
#include "i82801gx.h"
/* I945 */
@@ -410,6 +411,7 @@ static void southbridge_smi_apmc(unsigned int node, smm_state_save_area_t *state
static void southbridge_smi_pm1(unsigned int node, smm_state_save_area_t *state_save)
{
u16 pm1_sts;
+ volatile u8 cmos_status;
pm1_sts = reset_pm1_status();
dump_pm1_status(pm1_sts);
@@ -423,6 +425,12 @@ static void southbridge_smi_pm1(unsigned int node, smm_state_save_area_t *state_
reg32 = (7 << 10) | (1 << 13);
outl(reg32, pmbase + PM1_CNT);
}
+
+ if (pm1_sts & RTC_STS) {
+ /* read RTC status register to disable the interrupt */
+ cmos_status = cmos_read(RTC_REG_C);
+ printk(BIOS_DEBUG, "RTC IRQ status: %02X\n", cmos_status);
+ }
}
static void southbridge_smi_gpe0(unsigned int node, smm_state_save_area_t *state_save)