diff options
| -rw-r--r-- | src/cpu/intel/haswell/smmrelocate.c | 7 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 6 |
3 files changed, 16 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c index 65ac36388f..a8ab841492 100644 --- a/src/cpu/intel/haswell/smmrelocate.c +++ b/src/cpu/intel/haswell/smmrelocate.c @@ -396,7 +396,8 @@ int smm_initialize(void) if (cpu_smm_setup()) return -1; - southbridge_smm_init(); + /* Clear the SMM state in the southbridge. */ + southbridge_smm_clear_state(); /* Run the relocation handler. */ smm_initiate_relocation(); @@ -412,6 +413,10 @@ int smm_initialize(void) release_aps_for_smm_relocation(0); } + /* Now that all APs have been relocated as well as the BSP let SMIs + * start flowing. */ + southbridge_smm_enable_smi(); + /* Lock down the SMRAM space. */ smm_lock(); diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index ee2efd55bd..3535b987ce 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -170,9 +170,13 @@ void pch_log_state(void); void acpi_create_intel_hpet(acpi_hpet_t * hpet); /* These helpers are for performing SMM relocation. */ -void southbridge_smm_init(void); void southbridge_trigger_smi(void); void southbridge_clear_smi_status(void); +/* The initialization of the southbridge is split into 2 compoments. One is + * for clearing the state in the SMM registers. The other is for enabling + * SMIs. They are split so that other work between the 2 actions. */ +void southbridge_smm_clear_state(void); +void southbridge_smm_enable_smi(void); #else void enable_smbus(void); void enable_usb_bar(void); diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index 176d400256..75c3e66743 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -30,7 +30,7 @@ #include <string.h> #include "pch.h" -void southbridge_smm_init(void) +void southbridge_smm_clear_state(void) { u32 smi_en; @@ -54,7 +54,11 @@ void southbridge_smm_init(void) clear_pm1_status(); clear_tco_status(); clear_gpe_status(); +} +void southbridge_smm_enable_smi(void) +{ + printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ enable_pm1(PWRBTN_EN | GBL_EN); disable_gpe(PME_B0_EN); |