diff options
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/report_platform.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/cpu.h | 8 |
2 files changed, 3 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 9bca7acd23..969a8f73f9 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2015-2018 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,8 +20,8 @@ #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <intelblocks/mp_init.h> #include <soc/bootblock.h> -#include <soc/cpu.h> #include <soc/pch.h> #include <soc/pci_devs.h> #include <string.h> diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h index e50801f0b0..bde8f28f1a 100644 --- a/src/soc/intel/cannonlake/include/soc/cpu.h +++ b/src/soc/intel/cannonlake/include/soc/cpu.h @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. - * Copyright (C) 2017 Intel Corporation. + * Copyright (C) 2017-2018 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,12 +21,6 @@ #include <device/device.h> #include <intelblocks/msr.h> -/* Supported CPUIDs */ -#define CPUID_CANNONLAKE_A0 0x60660 -#define CPUID_CANNONLAKE_B0 0x60661 -#define CPUID_CANNONLAKE_C0 0x60662 -#define CPUID_CANNONLAKE_D0 0x60663 - /* Latency times in units of 1024ns. */ #define C_STATE_LATENCY_CONTROL_0_LIMIT 0x4e #define C_STATE_LATENCY_CONTROL_1_LIMIT 0x76 |